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Syed Azhar Ali Zaidi
Syed Azhar Ali Zaidi
UET Taxila, Pakistan
Verified email at uettaxila.edu.pk
Title
Cited by
Cited by
Year
A comparative survey of lidar-slam and lidar based sensor technologies
MU Khan, SAA Zaidi, A Ishtiaq, SUR Bukhari, S Samer, A Farman
2021 Mohammad Ali Jinnah University International Conference on Computing …, 2021
852021
Resource Management in Multicloud IoT Radio Access Network
M Awais, A Ahmed, SA Ali, M Naeem, W Ejaz, A Anpalagan
IEEE Internet of Things Journal 6 (2), 3014-3023, 2019
232019
Molecular transistor circuits: From device model to circuit simulation
A Zahir, SAA Zaidi, A Pulimeno, M Graziano, D Demarchi, G Masera, ...
Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale …, 2014
202014
A novel embedded system design for the detection and classification of cardiac disorders
U Riaz, S Aziz, M Umar Khan, SAA Zaidi, M Ukasha, A Rashid
Computational Intelligence 37 (4), 1844-1864, 2021
192021
FPGA accelerator of quasi cyclic EG-LDPC codes decoder for NAND flash memories
SAA Zaidi, M Awais, C Condo, M Martina, G Masera
2013 Conference on Design and Architectures for Signal and Image Processing …, 2013
72013
A single-layer, wideband and angularly stable metasurface based polarization converter for linear-to-linear cross-polarization conversion
A Rashid, M Murtaza, SAA Zaidi, H Zaki, FA Tahir
PloS one 18 (1), e0280469, 2023
42023
Performance Optimization of Apodized FBG Biomedical Sensor for Variation in Temperature and Presence of Noise
S Rani, S Haider, SHR Bukhari, SAA Zaidi, AB Huda
IEEJ Transactions on Electrical and Electronic Engineering, 2022
32022
An angularly stable broadband cross-polarization conversion metasurface
M Murtaza, A Rashid, T Ullah, FA Tahir, SAA Zaidi
2019 13th European Conference on Antennas and Propagation (EuCAP), 1-3, 2019
32019
FPGA accelerator of Algebraic Quasi Cyclic LDPC Codes for NAND flash memories
S Zaidi, A Tuoheti, M Martina, G Masera
Design and Test 33 (6), 77-84, 2016
22016
Uniform patterns based area-efficient and accurate stochastic computing finite impulse response filter
M Ijaz, SAA Zaidi, A Rashid
PLOS One 16, 1-14, 2021
12021
High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values
G Xiao, W Ahmad, SAA Zaidi, MR Roch, G Causapruno
Applications in Electronics Pervading Industry, Environment and Society …, 2016
12016
Rapid prototyping of floating point AWGN channel using high-level synthesis
SAA Zaidi, M Martina, G Masera
Forum on specification and Design Languages (FDL), 2014 Conference on, 165-168, 2014
12014
Real time vision-based implementation of plant disease identification system on FPGA
J Ahmed, SAA Zaidi, S Aziz, A Rashid, S Haider
Mehran University Research Journal Of Engineering & Technology 42 (2), 19-29, 2023
2023
An area efficient and high throughput implementation of layered min-sum iterative construction a posteriori probability LDPC decoder
H Raza, SAA Zaidi, A Rashid, S Haider
Plos one 16 (3), e0249269, 2021
2021
Design of LDPC Decoder for Error Correction in Memory Devices
S Zaidi
Politecnico di Torino, 2015
2015
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Articles 1–15