Nian-Ze Lee
Titolo
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Anno
Efficient computation of ECO patch functions
AQ Dao, NZ Lee, LC Chen, MPH Lin, JHR Jiang, A Mishchenko, ...
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
182018
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits
NZ Lee, HY Kuo, YH Lai, JHR Jiang
Proceedings of the 35th International Conference on Computer-Aided Design, 1-8, 2016
82016
Canonicalization of threshold logic representation and its applications
SY Lee, NZ Lee, JHR Jiang
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
52018
Towards formal evaluation and verification of probabilistic design
NZ Lee, JHR Jiang
IEEE Transactions on Computers 67 (8), 1202-1216, 2018
42018
Sequential engineering change order under retiming and resynthesis
NZ Lee, VN Kravets, JHR Jiang
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 109-116, 2017
42017
Stability analysis for safety of automotive multi-product lines: A search-based approach
NZ Lee, P Arcaini, S Ali, F Ishikawa
Proceedings of the Genetic and Evolutionary Computation Conference, 1241-1249, 2019
32019
Comprehensive Search for ECO Rectification Using Symbolic Sampling
VN Kravets, NZ Lee, JHR Jiang
2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019
32019
Solving Stochastic Boolean Satisfiability under Random-Exist Quantification.
NZ Lee, YS Wang, JHR Jiang
IJCAI, 688-694, 2017
32017
Towards a framework for the analysis of multi-product lines in the automotive domain
S Ali, P Arcaini, I Hasuo, F Ishikawa, NZ Lee
Proceedings of the 13th International Workshop on Variability Modelling of…, 2019
22019
Solving Exist-Random Quantified Stochastic Boolean Satisfiability via Clause Selection.
NZ Lee, YS Wang, JHR Jiang
IJCAI, 1339-1345, 2018
22018
Engineering change order for combinational and sequential design rectification
JHR Jiang, VN Kravets, NZ Lee
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 726-731, 2020
12020
Dependency Stochastic Boolean Satisfiability: A Logical Formalism for NEXPTIME Decision Problems with Uncertainty
NZ Lee, JHR Jiang
arXiv preprint arXiv:1911.04112, 2019
12019
Searching Parallel Separating Hyperplanes for Effective Compression of Threshold Logic Networks
SY Lee, NZ Lee, JHR Jiang
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
12019
Constraint Solving for Synthesis and Verification of Threshold Logic Circuits
NZ Lee, JHR Jiang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
2020
Scenario Sampling for Cyber Physical Systems using Combinatorial Testing
A Yamada, C Eberhart, F Ishikawa, NZ Lee
2019 IEEE International Conference on Software Testing, Verification and…, 2019
2019
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Articoli 1–15