| Enabling FPGAs in Hyperscale Data Centers J Weerasinghe, F Abel, C Hagleitner, A Herkersdorf In proc. IEEE Int'l Conference on Cloud and Big Data Computing (CBDCom …, 2015 | 91 | 2015 |
| A four-terabit packet switch supporting long round-trip times F Abel, C Minkenberg, RP Luijten, M Gusat, I Iliadis IEEE Micro 23 (1), 10-24, 2003 | 85 | 2003 |
| Selection of receive-queue based on packet attributes F Abel, C Basso, JL Calvignac, N Vaidhyanathan, FJ Verplanken, ... US Patent 8,675,660, 2014 | 84 | 2014 |
| Selection of receive-queue based on packet attributes F Abel, C Basso, JL Calvignac, N Vaidhyanathan, FJ Verplanken, ... US Patent 8,675,660, 2014 | 84 | 2014 |
| Designing a crossbar scheduler for HPC applications C Minkenberg, F Abel, P Muller, R Krishnamurthy, M Gusat, P Dill, I Iliadis, ... Ieee Micro 26 (3), 58-71, 2006 | 71 | 2006 |
| Network-attached FPGAs for data center applications J Weerasinghe, R Polig, F Abel, C Hagleitner 2016 International Conference on Field-Programmable Technology (FPT), 36-43, 2016 | 63 | 2016 |
| Low-latency pipelined crossbar arbitration C Minkenberg, I Iliadis, F Abel IEEE Global Telecommunications Conference, 2004. GLOBECOM'04. 2, 1174-1179, 2004 | 54 | 2004 |
| Load balancing system, apparatus and method FG Abel, P Buchmann, A Engbersen, A Herkersdorf, RP Luijten, DJ Webb US Patent 6,768,716, 2004 | 50 | 2004 |
| Design issues in next-generation merchant switch fabrics F Abel, C Minkenberg, I Iliadis, T Engbersen, M Gusat, F Gramsamer, ... IEEE/ACM Transactions on Networking 15 (6), 1603-1615, 2007 | 46 | 2007 |
| Method and system to reduce interconnect latency FG Abel, AF Benner, RR Grzybowski, BR Hemenway Jr, I Iliadis, ... US Patent 8,135,024, 2012 | 42 | 2012 |
| Method and system to reduce interconnect latency FG Abel, AF Benner, RR Grzybowski, BR Hemenway Jr, I Iliadis, ... US Patent 8,135,024, 2012 | 42 | 2012 |
| Method and system to reduce interconnect latency FG Abel, AF Benner, RR Grzybowski, BR Hemenway Jr, I Iliadis, ... US Patent 8,135,024, 2012 | 42 | 2012 |
| Control path implementation for a low-latency optical HPC switch C Minkenberg, F Abel, P Muller, R Krishnamurthy, M Gusat, ... 13th Symposium on High Performance Interconnects (HOTI'05), 29-35, 2005 | 42 | 2005 |
| A four-terabit single-stage packet switch with large round-trip time support F Abel, C Minkenberg, RP Luijten, M Gusat, I Iliadis Proceedings 10th Symposium on High Performance Interconnects, 5-14, 2002 | 29 | 2002 |
| Disaggregated fpgas: Network performance comparison against bare-metal servers, virtual machines and linux containers J Weerasinghe, F Abel, C Hagleitner, A Herkersdorf 2016 IEEE International Conference on Cloud Computing Technology and Science …, 2016 | 24 | 2016 |
| An FPGA platform for hyperscalers F Abel, J Weerasinghe, C Hagleitner, B Weiss, S Paredes 2017 IEEE 25th Annual Symposium on High-Performance Interconnects (HOTI), 29-32, 2017 | 23 | 2017 |
| Programmable multifield parser packet F Abel, J Calvignac, C Hagleitner, J Van Lunteren, F Verplanken US Patent 8,681,819, 2014 | 23 | 2014 |
| Method and arrangement for local synchronization in master-slave distributed communication systems M Colmant, A Benner, FG Abel, M Poret, N Schumacher, A Blanc, ... US Patent 7,720,105, 2010 | 18 | 2010 |
| Method and arrangement for local synchronization in master-slave distributed communication systems M Colmant, A Benner, FG Abel, M Poret, N Schumacher, A Blanc, ... US Patent 7,720,105, 2010 | 18 | 2010 |
| Method and arrangement for local synchronization in master-slave distributed communication systems M Colmant, A Benner, FG Abel, M Poret, N Schumacher, A Blanc, ... US Patent 7,720,105, 2010 | 18 | 2010 |
Cyriel MinkenbergRockley PhotonicsVerified email at rockleyphotonics.com
