Junkyo Suh
Junkyo Suh
a PhD student of Electrical Engineering, Stanford University
Verified email at stanford.edu
Cited by
Cited by
III–V/Ge channel MOS device technologies in nano CMOS era
S Takagi, R Zhang, J Suh, SH Kim, M Yokoyama, K Nishi, M Takenaka
Japanese Journal of Applied Physics 54 (6S1), 06FA01, 2015
Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications
HD Lee, SG Kim, K Cho, H Hwang, H Choi, J Lee, SH Lee, HJ Lee, J Suh, ...
2012 Symposium on VLSI Technology (VLSIT), 151-152, 2012
MOS interface and channel engineering for high-mobility Ge/III-V CMOS
S Takagi, R Zhang, SH Kim, N Taoka, M Yokoyama, JK Suh, R Suzuki, ...
2012 International Electron Devices Meeting, 23.1. 1-23.1. 4, 2012
Highly strained-SiGe-on-insulator p-channel metal-oxide-semiconductor field-effective transistors fabricated by applying Ge condensation technique to strained-Si-on-insulator …
J Suh, R Nakane, N Taoka, M Takenaka, S Takagi
Applied Physics Letters 99 (14), 142108, 2011
Passivation of multiple-quantum-well Ge0.97Sn0.03/Ge p-i-n photodetectors
M Morea, CE Brendel, K Zang, J Suh, CS Fenrich, YC Huang, H Chung, ...
Applied Physics Letters 110 (9), 091109, 2017
Investigation of the Changes in Electronic Properties of Nickel Oxide (NiOx) Due to UV/Ozone Treatment
R Islam, G Chen, P Ramesh, J Suh, N Fuchigami, D Lee, KA Littau, ...
ACS Applied Materials & Interfaces 9 (20), 17201-17207, 2017
Cubic-phase zirconia nano-island growth using atomic layer deposition and application in low-power charge-trapping nonvolatile-memory devices
N El-Atab, TG Ulusoy, A Ghobadi, J Suh, R Islam, AK Okyay, K Saraswat, ...
Nanotechnology 28 (44), 445201, 2017
Effects of additional oxidation after Ge condensation on electrical properties of germanium-on-insulator p-channel MOSFETs
J Suh, R Nakane, N Taoka, M Takenaka, S Takagi
Solid-State Electronics 117, 77-87, 2016
Neural Stain Normalization and Unsupervised Classification of Cell Nuclei in Histopathological Breast Cancer Images
E Yuan, J Suh
https://arxiv.org/abs/1811.03815, 2018
Semiconductor device and method for fabricating the same, and micro processor, processor, system, data storage system and memory system including the semiconductor device
HJ Choi, J Suh
US Patent App. 13/924,428, 2014
3D-stacked Strained SiGe/Ge Gate-All-Around (GAA) Structure Fabricated by 3D Ge Condensation
J Suh, AC Meng, M Jaikissoon, M Braun, TR Kim, AF Marshall, A Pakzad, ...
2019 Device Research Conference (DRC), 249-250, 2019
Three-dimensional semiconductor device and a system having the same
JK Suh
US Patent App. 14/933,882, 2016
Semiconductor apparatus, method for fabricating the same, and variable resistive memory device
JK Suh, KS Choi
US Patent App. 14/329,555, 2015
Resistance variable memory device
J Suh
US Patent App. 13/846,536, 2014
Highly-strained SGOI p-channel MOSFETs fabricated by applying Ge condensation technique to strained-SOI substrates
J Suh, R Nakane, N Taoka, M Takenaka, S Takagi
69th Device Research Conference, 235-236, 2011
Three-dimensional semiconductor device and method of manufacturing the same
JK Suh
US Patent 9,209,226, 2015
Semiconductor device and method for fabricating the same
JK Suh
US Patent 9,076,866, 2015
Fabrication of Ultra-Small Zirconia Nano-Islands Using Thermal Atomic Layer Deposition
N El-Atab, J Suh, R Islam, KC Saraswat, A Nayfeh
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