| Nimble page management for tiered memory systems Z Yan, D Lustig, D Nellans, A Bhattacharjee Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 173 | 2019 |
| Translation ranger: Operating system support for contiguity-aware tlbs Z Yan, D Lustig, D Nellans, A Bhattacharjee Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 69 | 2019 |
| LATR: Lazy translation coherence MK Kumar, S Maass, S Kashyap, J Veselę, Z Yan, T Kim, A Bhattacharjee, ... Proceedings of the Twenty-Third International Conference on Architectural …, 2018 | 63 | 2018 |
| Hardware Translation Coherence for Virtualized Systems Z Yan, J Veselę, G Cox, A Bhattacharjee ISCA '17 Proceedings of the 44th Annual International Symposium on Computer …, 2017 | 58 | 2017 |
| Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator O Villa, D Lustig, Z Yan, E Bolotin, Y Fu, N Chatterjee, N Jiang, D Nellans The 27th IEEE International Symposium on High-Performance Computer Architecture, 2021 | 38 | 2021 |
| Secure, consistent, and high-performance memory snapshotting G Cox, Z Yan, A Bhattacharjee, V Ganapathy Proceedings of the Eighth ACM Conference on Data and Application Security …, 2018 | 14* | 2018 |
| The implications of page size management on graph analytics A Manocha, Z Yan, E Tureci, JL Aragón, D Nellans, M Martonosi 2022 IEEE International Symposium on Workload Characterization (IISWC), 199-214, 2022 | 5 | 2022 |
| Architectural Support for Optimizing Huge Page Selection Within the OS A Manocha, Z Yan, E Tureci, JL Aragón, D Nellans, M Martonosi Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 2 | 2023 |
| SPARTA: A divide and conquer approach to address translation for accelerators J Picorel, SAS Kohroudi, Z Yan, A Bhattacharjee, B Falsafi, D Jevdjic arXiv preprint arXiv:2001.07045, 2020 | 2 | 2020 |
| A 3D-Stacked Architecture for Secure Memory Acquisition G Cox, Z Yan, A Bhattacharjee, V Ganapathy | 1 | 2016 |
| Hardware support for optimizing huge memory page selection A Manocha, Z Yan, D Nellans US Patent App. 18/118,020, 2024 | | 2024 |
| Automatic method for power management tuning in computing systems E Bolotin, Y Fu, Z Yan, G Dalal, S Mannor, D Nellans US Patent 11,880,261, 2024 | | 2024 |
| Virtual Memory for Next-Generation Tiered Memory Architectures Z Yan Rutgers University 2020, 01-31, 2019 | | 2019 |
Abhishek BhattacharjeeA. Bartlett Giamatti Professor of Computer Science, Yale UniversityVerified email at cs.yale.edu
