SRAM for error-tolerant applications with dynamic energy-quality management in 28 nm CMOS F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto IEEE Journal of Solid-state circuits 50 (5), 1310-1323, 2015 | 76 | 2015 |
Analytical delay model considering variability effects in subthreshold domain F Frustaci, P Corsonello, S Perri IEEE Transactions on Circuits and Systems II: Express Briefs 59 (3), 168-172, 2012 | 52 | 2012 |
Low-power split-path data-driven dynamic logic F Frustaci, M Lanuzza, P Zicari, S Perri, P Corsonello IET circuits, devices & systems 3 (6), 303-312, 2009 | 47 | 2009 |
Approximate SRAMs with dynamic energy-quality management F Frustaci, D Blaauw, D Sylvester, M Alioto IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2016 | 45 | 2016 |
High-performance noise-tolerant circuit techniques for CMOS dynamic logic F Frustaci, P Corsonello, S Perri, G Cocorullo IET circuits, devices & systems 2 (6), 537-548, 2008 | 41 | 2008 |
Design of efficient BCD adders in quantum-dot cellular automata G Cocorullo, P Corsonello, F Frustaci, S Perri IEEE Transactions on Circuits and Systems II: Express Briefs 64 (5), 575-579, 2016 | 38 | 2016 |
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 37 | 2014 |
Techniques for leakage energy reduction in deep submicrometer cache memories F Frustaci, P Corsonello, S Perri, G Cocorullo IEEE transactions on very large scale integration (vlsi) systems 14 (11 …, 2006 | 36 | 2006 |
Designing high-speed adders in power-constrained environments F Frustaci, M Lanuzza, P Zicari, S Perri, P Corsonello IEEE Transactions on Circuits and Systems II: Express Briefs 56 (2), 172-176, 2009 | 33 | 2009 |
A new low-power high-speed single-clock-cycle binary comparator F Frustaci, S Perri, M Lanuzza, P Corsonello Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 29 | 2010 |
Comparative analysis of yield optimized pulsed flip-flops M Lanuzza, R De Rose, F Frustaci, S Perri, P Corsonello Microelectronics Reliability 52 (8), 1679-1689, 2012 | 28 | 2012 |
Exploiting self-reconfiguration capability to improve sram-based fpga robustness in space and avionics applications M Lanuzza, P Zicari, F Frustaci, S Perri, P Corsonello ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (1), 1-22, 2010 | 26 | 2010 |
Energy‐efficient single‐clock‐cycle binary comparator F Frustaci, S Perri, M Lanuzza, P Corsonello International Journal of Circuit Theory and Applications 40 (3), 237-246, 2012 | 25 | 2012 |
An efficient connected component labeling architecture for embedded systems F Spagnolo, F Frustaci, S Perri, P Corsonello Journal of Low Power Electronics and Applications 8 (1), 7, 2018 | 21 | 2018 |
Impact of process variations on flip-flops energy and timing characteristics M Lanuzza, R De Rose, F Frustaci, S Perri, P Corsonello 2010 IEEE Computer Society Annual Symposium on VLSI, 458-459, 2010 | 21 | 2010 |
A self-hosting configuration management system to mitigate the impact of Radiation-Induced Multi-Bit Upsets in SRAM-based FPGAs M Lanuzza, P Zicari, F Frustaci, S Perri, P Corsonello 2010 IEEE International Symposium on Industrial Electronics, 1989-1994, 2010 | 21 | 2010 |
Design of efficient QCA multiplexers G Cocorullo, P Corsonello, F Frustaci, S Perri International Journal of Circuit Theory and Applications 44 (3), 602-615, 2016 | 20 | 2016 |
An embedded machine vision system for an in-line quality check of assembly processes F Frustaci, S Perri, G Cocorullo, P Corsonello Procedia Manufacturing 42, 211-218, 2020 | 19 | 2020 |
A new noise-tolerant dynamic logic circuit design F Frustaci, P Corsonello, G Cocorullo 2007 Ph. D Research in Microelectronics and Electronics Conference, 233-236, 2007 | 19 | 2007 |
Over/undershooting effects in accurate buffer delay model for sub-threshold domain P Corsonello, F Frustaci, M Lanuzza, S Perri IEEE Transactions on Circuits and Systems I: Regular Papers 61 (5), 1456-1464, 2014 | 18 | 2014 |