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Syed M. Alam
Syed M. Alam
Everspin Technologies, Inc.
Verified email at alum.mit.edu - Homepage
Title
Cited by
Cited by
Year
Three dimensional integrated circuit
SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ...
US Patent 7,312,487, 2007
3462007
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
AW Topol, DC La Tulipe, L Shi, SM Alam, DJ Frank, SE Steen, J Vichiconti, ...
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International …, 2005
3422005
Three dimensional integrated circuit and method of design
SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ...
US Patent 7,723,207, 2010
2572010
A fully functional 64 Mb DDR3 ST-MRAM built on 90 nm CMOS technology
ND Rizzo, D Houssameddine, J Janesky, R Whig, FB Mancoff, ...
IEEE Transactions on Magnetics 49 (7), 4441-4446, 2013
1612013
Power delivery design for 3-D ICs using different through-silicon via (TSV) technologies
NH Khan, SM Alam, S Hassoun
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (4), 647-658, 2010
1572010
A comprehensive layout methodology and layout-specific circuit analyses for three-dimensional integrated circuits
SM Alam, DE Troxel, CV Thompson
Proceedings International Symposium on Quality Electronic Design, 246-251, 2002
1412002
Layout-specific circuit evaluation in 3-D integrated circuits
SM Alam, DE Troxel, CV Thompson
Analog Integrated Circuits and Signal Processing 35, 199-206, 2003
1232003
Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits
I Savidis, SM Alam, A Jain, S Pozder, RE Jones, R Chatterjee
Microelectronics Journal 41 (1), 9-16, 2010
922010
Demonstration of a Reliable 1 Gb Standalone Spin-Transfer Torque MRAM For Industrial Applications
S Aggarwal, H Almasi, M DeHerrera, B Hughes, S Ikegawa, J Janesky, ...
2019 IEEE International Electron Devices Meeting (IEDM), 2.1. 1-2.1. 4, 2019
792019
High density ST-MRAM technology
JM Slaughter, ND Rizzo, J Janesky, R Whig, FB Mancoff, ...
Electron Devices Meeting (IEDM), 2012 IEEE International, 29.3. 1-29.3. 4, 2012
792012
System-level comparison of power delivery design for 2D and 3D ICs
NH Khan, SM Alam, S Hassoun
2009 IEEE International Conference on 3D System Integration, 1-7, 2009
642009
Inter-strata connection characteristics and signal transmission in three-dimensional (3D) integration technology
SM Alam, RE Jones, S Rauf, R Chatterjee
Proceedings of the 8th International Symposium on Quality Electronic Design …, 2007
632007
Low power magnetic quantum cellular automata realization using magnetic multi-layer structures
J Das, SM Alam, S Bhanja
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (3 …, 2011
572011
Method of forming a through-substrate via
TG Sparks, SM Alam, R Chatterjee, S Rauf
US Patent App. 11/558,988, 2008
572008
CMOS-embedded STT-MRAM arrays in 2x nm nodes for GP-MCU applications
D Shum, D Houssameddine, ST Woo, YS You, J Wong, KW Wong, ...
2017 Symposium on VLSI Technology, T208-T209, 2017
522017
Ultra-low power hybrid CMOS-magnetic logic architecture
J Das, SM Alam, S Bhanja
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (9), 2008-2016, 2012
492012
Through-silicon via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs
NH Khan, SM Alam, S Hassoun
2009 IEEE International Conference on 3D System Integration, 1-7, 2009
492009
Circuit level reliability analysis of Cu interconnects
SM Alam, GC Lip, CV Thompson, DE Troxel
Quality Electronic Design, 2004. Proceedings. 5th International Symposium on …, 2004
422004
Technology for reliable spin-torque MRAM products
JM Slaughter, K Nagel, R Whig, S Deshpande, S Aggarwal, M DeHerrera, ...
2016 IEEE International Electron Devices Meeting (IEDM), 21.5. 1-21.5. 4, 2016
402016
Circuit-level reliability requirements for Cu metallization
SM Alam, CL Gan, FL Wei, CV Thompson, DE Troxel
IEEE Transactions on Device and Materials Reliability 5 (3), 522-531, 2005
372005
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