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Seong-Ook Jung
Seong-Ook Jung
Professor of Electrical and Electronic Engineering, Yonsei University
Verified email at yonsei.ac.kr
Title
Cited by
Cited by
Year
A novel sensing circuit for deep submicron spin transfer torque MRAM (STT-MRAM)
J Kim, K Ryu, SH Kang, SO Jung
IEEE Transactions on very large scale integration (VLSI) systems 20 (1), 181-186, 2010
1042010
Invalid write prevention for STT-MRAM array
K Ryu, J Kim, SO Jung, SH Kang
US Patent 8,432,727, 2013
842013
Adaptive voltage scaling for an electronics device
M Elgebaly, KZ Malik, LG Chua-Eoan, SO Jung
US Patent 7,417,482, 2008
832008
Comparative study of various latch-type sense amplifiers
T Na, SH Woo, J Kim, H Jeong, SO Jung
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 425-429, 2013
812013
A magnetic tunnel junction based zero standby leakage current retention flip-flop
K Ryu, J Kim, J Jung, JP Kim, SH Kang, SO Jung
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (11 …, 2011
732011
Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size
SO Jung, MH Sani, SH Kang, SS Yoon
US Patent 8,144,509, 2012
712012
Power-gated 9T SRAM cell for low-energy operation
TW Oh, H Jeong, K Kang, J Park, Y Yang, SO Jung
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3 …, 2016
662016
Single data line sensing scheme for TCCT-based memory cells
SS Yoon, JM Han, SO Jung
US Patent 6,903,987, 2005
562005
Skew-tolerant high-speed (STHS) domino logic
SO Jung, SM Yoo, KW Kim, SM Kang
ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001
542001
Spin transfer torque magnetoresistive random access memory and design methods
SO Jung, SH Kang, SS Yoon, MH Sani
US Patent 7,764,537, 2010
532010
Numerical estimation of yield in sub-100-nm SRAM design using Monte Carlo simulation
H Nho, SS Yoon, SS Wong, SO Jung
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (9), 907-911, 2008
532008
Reference-scheme study and novel reference scheme for deep submicrometer STT-RAM
T Na, J Kim, JP Kim, SH Kang, SO Jung
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (12), 3376-3385, 2014
472014
Bit line control and sense amplification for TCCT-based memory cells
SS Yoon, SO Jung
US Patent 6,958,931, 2005
462005
Process-variation-calibrated multiphase delay locked loop with a loop-embedded duty cycle corrector
K Ryu, DH Jung, SO Jung
IEEE Transactions on Circuits and Systems II: Express Briefs 61 (1), 1-5, 2013
442013
A DLL with dual edge triggered phase detector for fast lock and low jitter clock generator
K Ryu, DH Jung, SO Jung
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (9), 1860-1870, 2012
422012
FinFET SRAM optimization with fin thickness and surface orientation
M Kang, SC Song, SH Woo, HK Park, MH Abu-Rahma, L Ge, BM Han, ...
IEEE Transactions on Electron Devices 57 (11), 2785-2793, 2010
412010
Slope interconnect effort: Gate-interconnect interdependent delay modeling for early CMOS circuit simulation
ME Hwang, SO Jung, K Roy
IEEE Transactions on Circuits and Systems I: Regular Papers 56 (7), 1428-1441, 2008
392008
Offset-canceling current-sampling sense amplifier for resistive nonvolatile memory in 65 nm CMOS
T Na, B Song, JP Kim, SH Kang, SO Jung
IEEE Journal of Solid-State Circuits 52 (2), 496-504, 2016
382016
An offset-canceling triple-stage sensing circuit for deep submicrometer STT-RAM
T Na, J Kim, JP Kim, SH Kang, SO Jung
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2014
382014
One-sided schmitt-trigger-based 9T SRAM cell for near-threshold operation
K Cho, J Park, TW Oh, SO Jung
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (5), 1551-1561, 2020
362020
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Articles 1–20