| A 14-mW 6.25-Gb/s transceiver in 90-nm CMOS J Poulton, R Palmer, AM Fuller, T Greer, J Eyles, WJ Dally, M Horowitz IEEE Journal of Solid-State Circuits 42 (12), 2745-2757, 2007 | 321 | 2007 |
| Future developments in brain-machine interface research MA Lebedev, AJ Tate, TL Hanson, Z Li, JE O'Doherty, JA Winans, PJ Ifft, ... Clinics 66, 25-32, 2011 | 157 | 2011 |
| A 4.3 GB/s mobile memory interface with power-efficient bandwidth scaling B Leibowitz, R Palmer, J Poulton, Y Frans, S Li, J Wilson, M Bucher, ... IEEE Journal of Solid-State Circuits 45 (4), 889-898, 2010 | 112 | 2010 |
| A 14mW 6.25 Gb/s transceiver in 90nm CMOS for serial chip-to-chip communications R Palmer, J Poulton, WJ Dally, J Eyles, AM Fuller, T Greer, M Horowitz, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 95 | 2007 |
| Edge-based sampler offset correction AM Fuller, J Poulton, R Inc., V Park, J Joseph US Patent 8,199,866, 2012 | 71 | 2012 |
| Mesochronous Signaling System with Clock-Stopped Low Power Mode FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 8,918,669, 2014 | 52 | 2014 |
| Subcortical neuronal ensembles: an analysis of motor task association, tremor, oscillations, and synchrony in human patients TL Hanson, AM Fuller, MA Lebedev, DA Turner, MAL Nicolelis Journal of Neuroscience 32 (25), 8620-8632, 2012 | 43 | 2012 |
| Latency compensation by horizontal scanline selection for head-mounted displays J Jerald, A Fuller, A Lastra, M Whitton, L Kohli, F Brooks Stereoscopic Displays and Virtual Reality Systems XIV 6490, 568-578, 2007 | 34 | 2007 |
| A 4.3 GB/s mobile memory interface with power-efficient bandwidth scaling R Palmer, J Poulton, B Leibowitz, Y Frans, S Li, A Fuller, J Eyles, J Wilson, ... 2009 Symposium on VLSI Circuits, 136-137, 2009 | 29 | 2009 |
| Mesochronous Signaling System with Core-Clock Synchronization FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 8,918,667, 2014 | 25 | 2014 |
| In-situ delay element calibration RE Palmer, MD Bucher, AM Fuller US Patent 9,419,598, 2016 | 16 | 2016 |
| Edge-based loss-of-signal detection AM Fuller, J Poulton, R Inc. US Patent 8,509,094, 2013 | 15 | 2013 |
| Memory controller with transaction-queue-dependent power modes FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 9,229,523, 2016 | 14 | 2016 |
| Design considerations for low-power high-performance mobile logic and memory interfaces R Palmer, J Poulton, A Fuller, J Chen, J Zerbe 2008 IEEE Asian Solid-State Circuits Conference, 205-208, 2008 | 14 | 2008 |
| Signaling interface with phase and framing calibration FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 10,331,193, 2019 | 10 | 2019 |
| Memory Controller with Transaction-Queue-Monitoring Power Mode Circuitry AMF FA Ware, RE Palmer, JW Poulton US Patent 9,043,633, 2015 | 10* | 2015 |
| Structure and magnetism of Coa (1− x) MnaxGeb epitaxial films F Tsui, L He, D Lorang, A Fuller, YS Chu, A Tkachuk, S Vogt Applied surface science 252 (7), 2512-2517, 2006 | 9 | 2006 |
| Low-power clock generation and distribution circuitry JW Poulton, RE Palmer, AM Fuller, R INC. US Patent 8,310,294, 2012 | 6 | 2012 |
| Memory IC with data loopback FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 11,556,164, 2023 | 1 | 2023 |
| Clock-forwarding memory controller with mesochronously-clocked signaling interface FA Ware, RE Palmer, JW Poulton, AM Fuller US Patent 10,901,485, 2021 | 1 | 2021 |
Mark HorowitzProfessor of Electrical Engineering and Computer ScienceVerified email at ee.stanford.edu
