Paolo Valente
Paolo Valente
Assistant Professor of Computer Science, Università di Modena e Reggio Emilia - Italy
Email verificata su - Home page
Citata da
Citata da
High throughput disk scheduling with fair bandwidth distribution
P Valente, F Checconi
Computers, IEEE Transactions on 59 (9), 1172-1186, 2010
QFQ: Efficient packet scheduling with tight guarantees
F Checconi, L Rizzo, P Valente
IEEE/ACM Transactions on Networking 21 (3), 802-816, 2012
An upper bound to the lateness of soft real-time tasks scheduled by EDF on multiprocessors
P Valente, G Lipari
Real-Time Systems Symposium, 2005. RTSS 2005. 26th IEEE International, 10 pp …, 2005
Exact GPS simulation with logarithmic complexity, and its application to an optimally fair scheduler
P Valente
Proceedings of the 2004 conference on Applications, technologies …, 2004
A memory-centric approach to enable timing-predictability within embedded many-core accelerators
P Burgio, A Marongiu, P Valente, M Bertogna
2015 CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST …, 2015
Sigamma: Server based integrated gpu arbitration mechanism for memory accesses
N Capodieci, R Cavicchioli, P Valente, M Bertogna
Proceedings of the 25th International Conference on Real-Time Networks and …, 2017
Exact GPS simulation and optimal fair scheduling with logarithmic complexity
P Valente
IEEE/ACM Transactions on Networking 15 (6), 1454-1466, 2007
Improving application responsiveness with the bfq disk i/o scheduler
P Valente, M Andreolini
Proceedings of the 5th Annual International Systems and Storage Conference, 1-12, 2012
A low-latency and high-throughput scheduler for emergency and wireless networks
M Casoni, CA Grazia, P Valente
2014 IEEE International Conference on Communications Workshops (ICC), 231-236, 2014
An STDMA-based framework for QoS provisioning in wireless mesh networks
M Leoncini, P Santi, P Valente
2008 5th IEEE International Conference on Mobile Ad Hoc and Sensor Systems …, 2008
Deterministic memory hierarchy and virtualization for modern multi-core embedded systems
T Kloda, M Solieri, R Mancuso, N Capodieci, P Valente, M Bertogna
2019 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2019
PSPAT: Software packet scheduling at hardware speed
L Rizzo, P Valente, G Lettieri, V Maffione
Computer Communications 120, 32-45, 2018
Reducing the execution time of fair-queueing packet schedulers
P Valente
Computer communications 47, 16-33, 2014
Direct vs 2-stage approaches to structured motif finding
M Federico, M Leoncini, M Montangero, P Valente
Algorithms for Molecular Biology 7 (1), 20, 2012
Integrating Linux and the real-time ERIKA OS through the Xen hypervisor
A Avanzini, P Valente, D Faggioli, P Gai
10th IEEE International Symposium on Industrial Embedded Systems (SIES), 1-7, 2015
Providing near-optimal fair-queueing guarantees at round-robin amortized cost
P Valente
2013 22nd International Conference on Computer Communication and Networks …, 2013
An efficient algorithm for planted structured motif extraction
M Federico, P Valente, M Leoncini, M Montangero, R Cavicchioli
Proceedings of the 1st ACM workshop on Breaking frontiers of computational …, 2009
Design and testing of scalable web-based systems with performance constraints
M Andreolini, M Colajanni, P Valente
2005 Workshop on Techniques, Methodologies and Tools for Performance …, 2005
Hybrid: achieving deterministic fairness and high throughput in disk scheduling
L Rizzo, P Valente
CCCT'04, 2004
On service guarantees of fair-queueing schedulers in real systems
L Rizzo, P Valente
Computer Communications 67, 34-44, 2015
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
Articoli 1–20