| An error-detection and self-repairing method for dynamically and partially reconfigurable systems MS Reorda, L Sterpone, A Ullah IEEE Transactions on Computers 66 (6), 1022-1033, 2016 | 60 | 2016 |
| Comparison based analysis of different cryptographic and encryption techniques using message authentication code (mac) in wireless sensor networks (wsn) SU Rehman, M Bilal, B Ahmad, KM Yahya, A Ullah, OU Rehman arXiv preprint arXiv:1203.3103, 2012 | 47 | 2012 |
| PR-TCAM: Efficient TCAM emulation on xilinx FPGAs using partial reconfiguration P Reviriego, A Ullah, S Pontarelli IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (8 …, 2019 | 37 | 2019 |
| Towards low latency and resource-efficient FPGA implementations of the MUSIC algorithm for direction of arrival estimation UM Butt, SA Khan, A Ullah, A Khaliq, P Reviriego, A Zahir IEEE Transactions on Circuits and Systems I: Regular Papers 68 (8), 3351-3362, 2021 | 34 | 2021 |
| On the optimal reconfiguration times for TMR circuits on SRAM based FPGAs L Sterpone, A Ullah 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), 9-14, 2013 | 31 | 2013 |
| Majority Voting-based Reduced Precision Redundancy Adders A Ullah, P Reviriego, S Pontarelli, JA Maestro IEEE Transactions on Device and Materials Reliability, 2017 | 30 | 2017 |
| An efficient methodology for on-chip SEU injection in flip-flops for Xilinx FPGAs A Ullah, P Reviriego, JA Maestro IEEE Transactions on Nuclear Science 65 (4), 989-996, 2018 | 28 | 2018 |
| Error detection and correction in SRAM emulated TCAMs P Reviriego, S Pontarelli, A Ullah IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (2), 486-490, 2018 | 27 | 2018 |
| Soft error tolerant convolutional neural networks on FPGAs with ensemble learning Z Gao, H Zhang, Y Yao, J Xiao, S Zeng, G Ge, Y Wang, A Ullah, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (3), 291-302, 2022 | 25 | 2022 |
| Efficient Protection of the Register File in Soft-processors Implemented on Xilinx FPGAs A Ramos, A Ullah, P Reviriego, JA Maestro IEEE Transactions on computers, 2017 | 24 | 2017 |
| Improving the hardware complexity by exploiting the reduced dynamics based fractional order systems N Ullah, A Ullah, A Ibeas, J Herrera IEEE Access 5, 7714 - 7723, 2017 | 21 | 2017 |
| Intelligent energy-based modified super twisting algorithm and factional order PID control for performance improvement of PMSG dedicated to tidal power system Y Belkhier, A Achour, N Ullah, RN Shaw, Z Farooq, A Ullah, AN Alzaed IEEE Access 9, 57414-57425, 2021 | 19 | 2021 |
| An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs A Ullah, E Sanchez, L Sterpone, LA Cardona, C Ferrer Microelectronics Reliability 75 (August 2017), 110-120, 2017 | 19 | 2017 |
| Design and implementation of configuration memory SEU-tolerant viterbi decoders in SRAM-based FPGAs Z Gao, J Zhu, R Han, Z Xu, A Ullah, P Reviriego IEEE Transactions on Nanotechnology 18, 691-699, 2019 | 18 | 2019 |
| Low delay single error correction and double adjacent error correction (SEC-DAEC) codes J Li, P Reviriego, L Xiao, Z Liu, L Li, A Ullah Microelectronics Reliability 97, 31-37, 2019 | 14 | 2019 |
| Design of FPGA-implemented Reed–Solomon erasure code (RS-EC) decoders with fault detection and location on user memory Z Gao, L Zhang, Y Cheng, K Guo, A Ullah, P Reviriego IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021 | 12 | 2021 |
| Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs E Sanchez, L Sterpone, A Ullah 2014 24th International Conference on Field Programmable Logic and …, 2014 | 12 | 2014 |
| FracTCAM: fracturable LUTRAM-based TCAM emulation on Xilinx FPGAs A Zahir, SK Khattak, A Ullah, P Reviriego, FB Muslim, W Ahmad IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (12 …, 2020 | 9 | 2020 |
| Systematic reliability evaluation of FPGA implemented CNN accelerators Z Gao, S Gao, Y Yao, Q Liu, S Zeng, G Ge, Y Wang, A Ullah, P Reviriego IEEE Transactions on Device and Materials Reliability 23 (1), 116-126, 2023 | 8 | 2023 |
| Reliability evaluation of FPGA based pruned neural networks Z Gao, Y Yao, X Wei, T Yan, S Zeng, G Ge, Y Wang, A Ullah, P Reviriego Microelectronics Reliability 130, 114498, 2022 | 8 | 2022 |
Luca SterponePolitecnico di TorinoVerified email at polito.it
