Follow
Atsushi Shirane
Title
Cited by
Cited by
Year
A 28-GHz CMOS phased-array transceiver based on LO phase-shifting architecture with gain invariant phase tuning for 5G new radio
J Pang, R Wu, Y Wang, M Dome, H Kato, H Huang, AT Narayanan, H Liu, ...
IEEE Journal of Solid-State Circuits 54 (5), 1228-1242, 2019
1752019
A 28-GHz CMOS phased-array beamformer utilizing neutralized bi-directional technique supporting dual-polarized MIMO for 5G NR
J Pang, Z Li, R Kubozoe, X Luo, R Wu, Y Wang, D You, AA Fadila, ...
IEEE Journal of Solid-State Circuits 55 (9), 2371-2386, 2020
1602020
A 39-GHz 64-element phased-array transceiver with built-in phase and amplitude calibrations for large-array 5G NR in 65-nm CMOS
Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ...
IEEE Journal of Solid-State Circuits 55 (5), 1249-1269, 2020
1582020
300-GHz-band 120-Gb/s wireless front-end based on InP-HEMT PAs and mixers
H Hamada, T Tsutsumi, H Matsuzaki, T Fujimura, I Abdo, A Shirane, ...
IEEE Journal of Solid-State Circuits 55 (9), 2316-2335, 2020
1122020
A 50.1-Gb/s 60-GHz CMOS transceiver for IEEE 802.11 ay with calibration of LO feedthrough and I/Q imbalance
J Pang, S Maki, S Kawai, N Nagashima, Y Seo, M Dome, H Kato, ...
IEEE Journal of Solid-State Circuits 54 (5), 1375-1390, 2019
772019
A 265- W Fractional- Digital PLL With Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65 …
H Liu, Z Sun, H Huang, W Deng, T Siriburanon, J Pang, Y Wang, R Wu, ...
IEEE Journal of Solid-State Circuits 54 (12), 3478-3492, 2019
612019
A CMOS dual-polarized phased-array beamformer utilizing cross-polarization leakage cancellation for 5G MIMO systems
J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ...
IEEE Journal of Solid-State Circuits 56 (4), 1310-1326, 2021
512021
13.8 A 5.8 GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique
A Shirane, H Tan, Y Fang, T Ibe, H Ito, N Ishihara, K Masu
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
462015
A 300GHz wireless transceiver in 65nm CMOS for IEEE802. 15.3 d using push-push subharmonic mixer
I Abdo, T Fujimura, T Miura, KK Tokgoz, H Hamada, H Nosaka, A Shirane, ...
2020 IEEE/MTT-S International Microwave Symposium (IMS), 623-626, 2020
452020
RF-powered transceiver with an energy-and spectral-efficient IF-based quadrature backscattering transmitter
A Shirane, Y Fang, H Tan, T Ibe, H Ito, N Ishihara, K Masu
IEEE Journal of Solid-State Circuits 50 (12), 2975-2987, 2015
442015
ULPAC: A miniaturized ultralow-power atomic clock
H Zhang, H Herdian, AT Narayanan, A Shirane, M Suzuki, K Harasaka, ...
IEEE Journal of Solid-State Circuits 54 (11), 3135-3148, 2019
432019
A 39GHz 64-element phased-array CMOS transceiver with built-in calibration for large-array 5G NR
Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ...
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 279-282, 2019
382019
22.2 A 300GHz-band phased-array transceiver using bi-directional outphasing and Hartley architecture in 65nm CMOS
I Abdo, C da Gomez, C Wang, K Hatano, Q Li, C Liu, K Yanagisawa, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 316-318, 2021
372021
A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration
B Liu, Y Zhang, J Qiu, HC Ngo, W Deng, K Nakata, T Yoshioka, J Emmei, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (2), 603-616, 2020
332020
A 28.16-Gb/s area-efficient 60-GHz CMOS bidirectional transceiver for IEEE 802.11 ay
J Pang, KK Tokgoz, S Maki, Z Li, X Luo, I Abdo, S Kawai, H Liu, Z Sun, ...
IEEE transactions on microwave theory and techniques 68 (1), 252-263, 2019
242019
A fully-synthesizable fractional-N injection-locked PLL for digital clocking with triangle/sawtooth spread-spectrum modulation capability in 5-nm CMOS
B Liu, Y Zhang, J Qiu, H Huang, Z Sun, D Xu, H Zhang, Y Wang, J Pang, ...
IEEE Solid-State Circuits Letters 3, 34-37, 2020
232020
0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur
H Zhang, AT Narayanan, H Herdian, B Liu, Y Wang, A Shirane, K Okada
2019 Symposium on VLSI Circuits, C38-C39, 2019
232019
A bi-directional 300-GHz-band phased-array transceiver in 65-nm CMOS with outphasing transmitting mode and LO emission cancellation
I Abdo, C Da Gomez, C Wang, K Hatano, Q Li, C Liu, K Yanagisawa, ...
IEEE Journal of Solid-State Circuits 57 (8), 2292-2308, 2022
212022
A 28-GHz phased-array relay transceiver for 5G network using vector-summing backscatter with 24-GHz wireless power and LO transfer
M Ide, A Shirane, K Yanagisawa, D You, J Pang, K Okada
IEEE Journal of Solid-State Circuits 57 (4), 1211-1223, 2022
162022
A 68-dB isolation 1.0-dB loss compact CMOS SPDT RF switch utilizing switched resonance network
X Fu, Y Wang, Z Li, A Shirane, K Okada
2020 IEEE/MTT-S International Microwave Symposium (IMS), 1315-1318, 2020
162020
The system can't perform the operation now. Try again later.
Articles 1–20