|Architecture exploration for ambient energy harvesting nonvolatile processors|
K Ma, Y Zheng, S Li, K Swaminathan, X Li, Y Liu, J Sampson, Y Xie, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
|Ambient energy harvesting nonvolatile processors: from circuit to system|
Y Liu, Z Li, H Li, Y Wang, X Li, K Ma, S Li, MF Chang, S John, Y Xie, J Shu, ...
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
|Tunnel FET RF rectifier design for energy harvesting applications|
H Liu, X Li, R Vaddi, K Ma, S Datta, V Narayanan
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (4 …, 2014
|Pairwise coupled hybrid vanadium dioxide-MOSFET (HVFET) oscillators for non-boolean associative computing|
N Shukla, A Parihar, M Cotter, M Barth, X Li, N Chandramoorthy, H Paik, ...
2014 IEEE International Electron Devices Meeting, 28.7. 1-28.7. 4, 2014
|Nonvolatile memory design based on ferroelectric FETs|
S George, K Ma, A Aziz, X Li, A Khan, S Salahuddin, MF Chang, S Datta, ...
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
|Nonvolatile processor architecture exploration for energy-harvesting applications|
K Ma, X Li, S Li, Y Liu, JJ Sampson, Y Xie, V Narayanan
IEEE Micro 35 (5), 32-40, 2015
|RF-powered systems using steep-slope devices|
X Li, UD Heo, K Ma, V Narayanan, H Liu, S Datta
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 73-76, 2014
|Enabling energy-efficient nonvolatile computing with negative capacitance FET|
X Li, J Sampson, A Khan, K Ma, S George, A Aziz, SK Gupta, ...
IEEE Transactions on Electron Devices 64 (8), 3452-3458, 2017
|Incidental computing on IoT nonvolatile processors|
K Ma, X Li, J Li, Y Liu, Y Xie, J Sampson, MT Kandemir, V Narayanan
2017 50th Annual IEEE/ACM International Symposium on Microarchitecture …, 2017
|Advancing nonvolatile computing with nonvolatile NCFET latches and flip-flops|
X Li, S George, K Ma, WY Tsai, A Aziz, J Sampson, SK Gupta, MF Chang, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (11), 2907-2919, 2017
|Sticker: A 0.41-62.1 TOPS/W 8Bit neural network processor with multi-sparsity compatible convolution arrays and online tuning acceleration for fully connected layers|
Z Yuan, J Yue, H Yang, Z Wang, J Li, Y Yang, Q Guo, X Li, MF Chang, ...
2018 IEEE Symposium on VLSI Circuits, 33-34, 2018
|Comparative area and parasitics analysis in FinFET and heterojunction vertical TFET standard cells|
MS Kim, W Cane-Wissing, X Li, J Sampson, S Datta, SK Gupta, ...
ACM Journal on Emerging Technologies in Computing Systems (JETC) 12 (4), 1-23, 2016
|Enabling new computation paradigms with HyperFET-an emerging device|
WY Tsai, X Li, M Jerry, B Xie, N Shukla, H Liu, N Chandramoorthy, ...
IEEE Transactions on Multi-Scale Computing Systems 2 (1), 30-48, 2016
|Nonvolatile processor architectures: Efficient, reliable progress with unstable power|
K Ma, X Li, K Swaminathan, Y Zheng, S Li, Y Liu, Y Xie, JJ Sampson, ...
IEEE Micro 36 (3), 72-83, 2016
|Device circuit co design of FEFET based logic for low voltage processors|
S George, A Aziz, X Li, MS Kim, S Datta, J Sampson, S Gupta, ...
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 649-654, 2016
|Phase transition oxide neuron for spiking neural networks|
M Jerry, W Tsai, B Xie, X Li, V Narayanan, A Raychowdhury, S Datta
2016 74th Annual Device Research Conference (DRC), 1-2, 2016
|Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors|
K Ma, X Li, SR Srinivasa, Y Liu, J Sampson, Y Xie, V Narayanan
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 678-683, 2017
|A steep-slope tunnel FET based SAR analog-to-digital converter|
MS Kim, H Liu, X Li, S Datta, V Narayanan
IEEE Transactions on Electron Devices 61 (11), 3661-3667, 2014
|A 14 bit 500 MS/s CMOS DAC using complementary switched current sources and time-relaxed interleaving DRRZ|
X Li, Q Wei, Z Xu, J Liu, H Wang, H Yang
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (8), 2337-2347, 2014
|7.5 A 65nm 0.39-to-140.3 TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1× Higher TOPS/mm 2 and 6T HBST …|
J Yue, R Liu, W Sun, Z Yuan, Z Wang, YN Tu, YJ Chen, A Ren, Y Wang, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 138-140, 2019