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Pietro Monsurrò
Pietro Monsurrò
DIET University of Rome Sapienza
Email verificata su uniroma1.it
Titolo
Citata da
Citata da
Anno
Design solutions for sample-and-hold circuits in CMOS nanometer technologies
F Centurelli, P Monsurrò, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 459-463, 2009
552009
Efficient digital background calibration of time-interleaved pipeline analog-to-digital converters
F Centurelli, P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (7), 1373-1383, 2012
492012
Linearization technique for source-degenerated CMOS differential transconductors
P Monsurro, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (10), 848-852, 2007
462007
88-A 1-MHz Stray-Insensitive CMOS Current-Mode Interface IC for Differential Capacitive Sensors
G Scotti, S Pennisi, P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (7), 1905-1916, 2014
392014
Exploiting the body of MOS devices for high performance analog design
P Monsurro, S Pennisi, G Scotti, A Trifiletti
IEEE Circuits and Systems Magazine 11 (4), 8-23, 2011
382011
0.9‐V CMOS cascode amplifier with body‐driven gain boosting
P Monsurro, S Pennisi, G Scotti, A Trifiletti
International Journal of Circuit Theory and Applications 37 (2), 193-202, 2009
372009
Behavioral modeling for calibration of pipeline analog-to-digital converters
F Centurelli, P Monsurro, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (6), 1255-1264, 2010
342010
Biasing technique via bulk terminal for minimum supply CMOS amplifiers
P Monsurrò, G Scotti, A Trifiletti, S Pennisi
Electronics Letters 41 (14), 779-780, 2005
342005
Univariate power analysis attacks exploiting static dissipation of nanometer CMOS VLSI circuits for cryptographic applications
D Bellizia, S Bongiovanni, P Monsurrò, G Scotti, A Trifiletti
IEEE Transactions on Emerging Topics in Computing 5 (3), 329-339, 2016
302016
Analysis and implementation of a minimum-supply body-biased CMOS differential amplifier cell
AD Grasso, P Monsurrò, S Pennisi, G Scotti, A Trifiletti
IEEE transactions on very large scale integration (VLSI) systems 17 (2), 172-180, 2008
292008
A class-AB flipped voltage follower output stage
F Centurelli, P Monsurrò, A Trifiletti
2011 20th European Conference on Circuit Theory and Design (ECCTD), 757-760, 2011
282011
Secure double rate registers as an RTL countermeasure against power analysis attacks
D Bellizia, S Bongiovanni, P Monsurrò, G Scotti, A Trifiletti, FB Trotta
IEEE transactions on very large scale integration (vlsi) systems 26 (7 …, 2018
272018
Improved digital background calibration of time-interleaved pipeline A/D converters
F Centurelli, P Monsurro, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 60 (2), 86-90, 2013
272013
Calibration of time-interleaved ADCs via Hermitianity-preserving Taylor approximations
P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 64 (4), 357-361, 2016
222016
Low power DDA-based instrumentation amplifier for neural recording applications in 65 nm CMOS
M Avoli, F Centurelli, P Monsurrò, G Scotti, A Trifiletti
AEU-International Journal of Electronics and Communications 92, 30-35, 2018
212018
A topology of fully differential class-AB symmetrical OTA with improved CMRR
F Centurelli, P Monsurrò, G Parisi, P Tommasino, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1504-1508, 2017
212017
New models for the calibration of four-channel time-interleaved ADCs using filter banks
P Monsurrò, F Rosato, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (2), 141-145, 2017
202017
A model for the distortion due to switch on-resistance in sample-and-hold circuits
F Centurelli, P Monsurro, A Trifiletti
2006 IEEE International Symposium on Circuits and Systems, 4 pp., 2006
182006
0.6‐V CMOS cascode OTA with complementary gate‐driven gain‐boosting and forward body bias
D Cellucci, F Centurelli, V Di Stefano, P Monsurrò, S Pennisi, G Scotti, ...
International Journal of Circuit Theory and Applications 48 (1), 15-27, 2020
172020
Streamline calibration modelling for a comprehensive design of ATI-based digitizers
P Monsurrò, A Trifiletti, L Angrisani, M D'Arco
Measurement 125, 386-393, 2018
172018
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
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