cinzia bernardeschi
cinzia bernardeschi
Department of Information Engineering, University of Pisa
Verified email at unipi.it - Homepage
Title
Cited by
Cited by
Year
A formal verification environment for railway signaling system design
C Bernardeschi, A Fantechi, S Gnesi, S Larosa, G Mongardi, D Romano
Formal Methods in System Design 12 (2), 139-161, 1998
801998
Model checking fault tolerant systems
C Bernardeschi, A Fantechi, S Gnesi
Software testing, verification and reliability 12 (4), 251-275, 2002
642002
Design and safety verification of a distributed charge equalizer for modular li-ion batteries
F Baronti, C Bernardeschi, L Cassano, A Domenici, R Roncella, R Saletti
IEEE Transactions on Industrial Informatics 10 (2), 1003-1011, 2014
472014
Java bytecode verification for secure information flow
M Avvenuti, C Bernardeschi, N De Francesco
ACM SIGPLAN Notices 38 (12), 20-27, 2003
472003
Checking security of java bytecode by abstract interpretation
R Barbuti, C Bernardeschi, N De Francesco
Proceedings of the 2002 ACM symposium on Applied computing, 229-236, 2002
392002
Formally verifying fault tolerant system designs
C Bernardeschi, A Fantechi, L Simoncini
The Computer Journal 43 (3), 191-205, 2000
392000
A PVS-simulink integrated environment for model-based analysis of cyber-physical systems
C Bernardeschi, A Domenici, P Masci
IEEE Transactions on Software Engineering 44 (6), 512-533, 2017
362017
SRAM-based FPGA systems for safety-critical applications: A survey on design standards and proposed methodologies
C Bernardeschi, L Cassano, A Domenici
Journal of Computer Science and Technology 30 (2), 373-390, 2015
342015
Combining abstract interpretation and model checking for analysing security properties of Java bytecode
C Bernardeschi, N De Francesco
International Workshop on Verification, Model Checking, and Abstract …, 2002
342002
Accurate simulation of SEUs in the configuration memory of SRAM-based FPGAs
C Bernardeschi, L Cassano, A Domenici, L Sterpone
2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2012
312012
Abstract interpretation of operational semantics for secure information flow
R Barbuti, C Bernardeschi, N De Francesco
282002
Early prototyping of wireless sensor network algorithms in PVS
C Bernardeschi, P Masci, H Pfeifer
International Conference on Computer Safety, Reliability, and Security, 346-359, 2008
262008
Transformations and consistent semantics for ODP viewpoints
C Bernardeschi, J Dustzadeh, A Fantechi, E Najm, A Nimour, F Olsen
Formal Methods for Open Object-based Distributed Systems, 371-386, 1997
251997
Checking secure information flow in java bytecode by code transformation and standard bytecode verification
C Bernardeschi, N De Francesco, G Lettieri, L Martini
Software: Practice and Experience 34 (13), 1225-1255, 2004
242004
Analysis of wireless sensor network protocols in dynamic scenarios
C Bernardeschi, P Masci, H Pfeifer
Symposium on Self-Stabilizing Systems, 105-119, 2009
222009
Extending a user interface prototyping tool with automatic MISRA C code generation
G Mauro, H Thimbleby, A Domenici, C Bernardeschi
arXiv preprint arXiv:1701.08468, 2017
212017
ASSESS: A simulator of soft errors in the configuration memory of SRAM-based FPGAs
C Bernardeschi, L Cassano, A Domenici, L Sterpone
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
212014
GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs
C Bernardeschi, L Cassano, MGCA Cimino, A Domenici
Journal of Systems Architecture 59 (10), 1243-1254, 2013
212013
Combining PVSio with stateflow
P Masci, Y Zhang, P Jones, P Oladimeji, E D’Urso, C Bernardeschi, ...
NASA Formal Methods Symposium, 209-214, 2014
202014
JCSI: A tool for checking secure information flow in java card applications
M Avvenuti, C Bernardeschi, N De Francesco, P Masci
Journal of Systems and Software 85 (11), 2479-2493, 2012
182012
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