Christoph Sandner
Christoph Sandner
Senior Principal Engineer, Infineon Technologies Austria AG
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A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-/spl mu/m digital CMOS
C Sandner, M Clara, A Santner, T Hartig, F Kuttner
IEEE Journal of Solid-State Circuits 40 (7), 1499-1505, 2005
On the jitter requirements of the sampling clock for analog-to-digital converters
N Da Dalt, M Harteneck, C Sandner, A Wiesbauer
IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2002
Transformer-based dual-mode voltage-controlled oscillators
A Bevilacqua, FP Pavan, C Sandner, A Gerosa, A Neviani
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (4), 293-297, 2007
A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers
A Bevilacqua, C Sandner, A Gerosa, A Neviani
IEEE Microwave and wireless components letters 16 (3), 134-136, 2006
A wimedia/mboa-compliant cmos rf transceiver for uwb
C Sandner, S Derksen, D Draxelmayr, S Ek, V Filimon, G Leach, S Marsili, ...
IEEE Journal of Solid-State Circuits 41 (12), 2787-2794, 2006
Analysis and design of an integrated notch filter for the rejection of interference in UWB systems
A Vallese, A Bevilacqua, C Sandner, M Tiebout, A Gerosa, A Neviani
IEEE Journal of Solid-State Circuits 44 (2), 331-343, 2009
Fully integrated distributed power amplifier in CMOS technology, optimized for UWB transmitters
C Grewing, K Winterberg, S van Waasen, M Friedrich, GL Puma, ...
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of …, 2004
A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS
N Da Dalt, C Sandner
IEEE Journal of Solid-State Circuits 38 (7), 1275-1278, 2003
A 3.4-7 GHz transformer-based dual-mode wideband VCO
A Bevilacqua, FP Pavan, C Sandner, A Gerosa, A Neviani
2006 Proceedings of the 32nd European Solid-State Circuits Conference, 440-443, 2006
UWB fast-hopping frequency generation based on sub-harmonic injection locking
S Dal Toso, A Bevilacqua, M Tiebout, S Marsili, C Sandner, A Gerosa, ...
IEEE Journal of Solid-State Circuits 43 (12), 2844-2852, 2008
A 0.13/spl mu/m CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers
A Bevilacqua, A Vallese, C Sandner, M Tiebout, A Gerosa, A Neviani
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007
A fully integrated 13 GHz/spl Delta//spl Sigma/fractional-n PLL in 0.13/spl mu/m CMOS
M Tiebout, C Sandner, HD Wohlmuth, N Da Dalt, E Thaller
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
Oscillator and method for generating an oscillator signal
A Bevilacqua, FP Pavan, C Sandner
US Patent 7,423,495, 2008
Digital phase-locked loop
N Da Dalt, C Sandner
US Patent 6,970,046, 2005
Circuit for the glitch-free changeover of digital signals
C Sandner
US Patent 6,075,392, 2000
Automatic dead time optimization in a high frequency DC-DC buck converter in 65 nm CMOS
G Maderbacher, T Jackum, W Pribyl, M Wassermann, A Petschar, ...
2011 Proceedings of the ESSCIRC (ESSCIRC), 487-490, 2011
Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97%
T Santa, M Auer, C Sandner, C Lindholm
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1351-1354, 2011
A fully integrated 2.4 GHz LC-VCO frequency synthesizer with 3ps jitter in 0.18 µm standard digital CMOS copper technology
N Da Dalt, S Derksen, P Greco, C Sandner, H Schmid, K Strohmayer
Proceedings of the 27th European Solid-State Circuits Conference, 510-513, 2001
Dead-time optimization of DC-DC converters
C Sandner, G Maderbacher
US Patent 9,712,046, 2017
5.8 A digitally assisted single-point-calibration CMOS bandgap voltage reference with a 3σ inaccuracy of±0.08% for fuel-gauge applications
G Maderbacher, S Marsili, M Motz, T Jackum, J Thielmann, H Hassander, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
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