| Chip multithreading: Opportunities and challenges L Spracklen, SG Abraham 11th International symposium on high-performance computer architecture, 248-252, 2005 | 243 | 2005 |
| UltraSPARC T2: A highly-treaded, power-efficient, SPARC SOC M Shah, J Barreh, J Brooks, R Golla, G Grohoski, N Gura, R Hetherington, ... 2007 IEEE Asian Solid-State Circuits Conference, 22-25, 2007 | 167 | 2007 |
| Effective stream-based and execution-based data prefetching S Iacobovici, L Spracklen, S Kadambi, Y Chou, SG Abraham Proceedings of the 18th annual international conference on Supercomputing, 1-11, 2004 | 117 | 2004 |
| Effective instruction prefetching in chip multiprocessors for modern commercial applications L Spracklen, Y Chou, SG Abraham 11th International Symposium on High-Performance Computer Architecture, 225-236, 2005 | 94 | 2005 |
| Memory-link compression schemes: A value locality perspective M Thuresson, L Spracklen, P Stenstrom IEEE Transactions on Computers 57 (7), 916-927, 2008 | 78 | 2008 |
| Checksum determination using parallel computations on multiple packed data elements LA Spracklen US Patent 5,960,012, 1999 | 76 | 1999 |
| Apparatus and method for implementing instruction support for performing a cyclic redundancy check (CRC) CH Olson, GF Grohoski, LA Spracklen US Patent 8,417,961, 2013 | 60 | 2013 |
| Efficient on-chip accelerator interfaces to reduce software overhead LA Spracklen, SG Abraham, AR Talcott US Patent 7,827,383, 2010 | 53 | 2010 |
| Enabling on-chip features via efuses GF Grohoski, CH Olson, TA Ziaja, LA Spracklen US Patent 7,795,899, 2010 | 52 | 2010 |
| Method and system for enhancing user experience for remoting technologies LA Spracklen, B Agrawal, R Bidarkar US Patent 9,257,092, 2016 | 46 | 2016 |
| Method and system for measuring display performance of a remote application R Bidarkar, B Agrawal, LA Spracklen, H Sivaraman US Patent 8,902,248, 2014 | 46 | 2014 |
| Store memory-level parallelism optimizations for commercial applications Y Chou, L Spracklen, SG Abraham 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005 | 43 | 2005 |
| Apparatus and method for implementing instruction support for the advanced encryption standard (aes) algorithm CH Olson, GF Grohoski, LA Spracklen US Patent App. 12/414,852, 2010 | 40 | 2010 |
| Microprocessor data manipulation matrix module L Spracklen US Patent App. 10/154,774, 2003 | 36 | 2003 |
| Performance-imbalance-monitoring processor features LA Spracklen US Patent App. 13/491,444, 2013 | 35 | 2013 |
| Monitoring audio fidelity and audio-video synchronization LA Spracklen US Patent 8,788,079, 2014 | 33 | 2014 |
| Method for rapid interpretation of results returned by a parallel compare instruction L Spracklen US Patent 7,003,653, 2006 | 32 | 2006 |
| Low overhead access to shared on-chip hardware accelerator with memory-based interfaces LA Spracklen, AR Talcott, SG Abraham, S Soun, S Patel, F Sajjadian US Patent 7,809,895, 2010 | 31 | 2010 |
| Accelerating cryptographic hash computations LA Spracklen US Patent 7,599,489, 2009 | 31 | 2009 |
| Execution displacement read-write alias prediction LA Spracklen, SG Abraham, S Vlaovic US Patent 7,434,031, 2008 | 31 | 2008 |
Hans EberleNVIDIAEmail verificata su computer.org
