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Pooria M. Yaghini
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Analytical Fault Tolerance Assessment and Metrics for TSV-based 3D Network-on-Chip
A Eghbal, PM Yaghini, N Bagherzadeh, M Khayyambashi
712015
Designing fault-tolerant network-on-chip router architecture
A Eghbal, PM Yaghini, H Pedram, HR Zarandi
International Journal of Electronics 97 (10), 1181-1192, 2010
262010
Investigation of transient fault effects in synchronous and asynchronous network on chip router
PM Yaghini, A Eghbal, H Pedram, HR Zarandi
Journal of Systems Architecture 57 (1), 61-68, 2011
232011
Designing and implementation of a network on chip router based on handshaking communication mechanism
SA Asghari, H Pedram, M Khademi, P Yaghini
World Applied Sciences Journal 6 (1), 88-93, 2009
232009
Investigation of transient fault effects in an asynchronous NoC router
PM Yaghini, A Eghbal, H Pedram, HR Zarandi
2010 18th Euromicro Conference on Parallel, Distributed and Network-based …, 2010
212010
Analytical reliability analysis of 3D NoC under TSV failure
M Khayambashi, PM Yaghini, A Eghbal, N Bagherzadeh
ACM Journal on Emerging Technologies in Computing Systems (JETC) 11 (4), 1-16, 2015
202015
Three-dimensional NoC reliability evaluation
A Eghbal, PM Yaghini, N Bagherzadeh
US Patent 11,093,673, 2021
192021
Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs
P M Yaghini, A Eghbal, S Yazdi, N Bagherzadeh, M Green
IEEE, 2015
182015
Power comparison of an asynchronous and synchronous network on chip router
PM Yaghini, A Eghbal, SA Asghari, H Pedram
2009 14th International CSI Computer Conference, 242-246, 2009
172009
Fault injection-based evaluation of a synchronous noc router
A Eghbal, PM Yaghini, H Pedram, HR Zarandi
2009 15th IEEE International On-Line Testing Symposium, 212-214, 2009
162009
Deadlock verification of cache coherence protocols and communication fabrics
F Verbeek, PM Yaghini, A Eghbal, N Bagherzadeh
IEEE Transactions on Computers 66 (2), 272-284, 2016
132016
Tsv-to-tsv inductive coupling-aware coding scheme for 3d network-on-chip
A Eghbal, PM Yaghini, SS Yazdi, N Bagherzadeh
2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2014
132014
On the design of hybrid routing mechanism for mesh-based network-on-chip
PM Yaghini, A Eghbal, N Bagherzadeh
Integration 50, 183-192, 2015
122015
A gals router for asynchronous network-on-chip
PM Yaghini, A Eghbal, N Bagherzadeh
Proceedings of International Workshop on Manycore Embedded Systems, 52-55, 2014
92014
Coupling mitigation in 3-D multiple-stacked devices
PM Yaghini, A Eghbal, M Khayambashi, N Bagherzadeh
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (12 …, 2015
82015
Capacitive Coupling Mitigation for TSV-based 3D ICs
A Eghbal, PM Yaghini, N Bagherzadeh
IEEE, 2015
82015
Fault tolerance assessment of pic microcontroller based on fault injection
A Eghbal, HR Zarandi, PM Yaghini
2009 10th Latin American Test Workshop, 1-6, 2009
82009
ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects
F Verbeek, PM Yaghini, A Eghbal, N Bagherzadeh
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
72016
Accurate system-level TSV-to-TSV capacitive coupling fault model for 3D-NoC
PM Yaghini, A Eghbal, SS Yazdi, N Bagherzadeh
Proceedings of the 9th International Symposium on Networks-on-Chip, 1-8, 2015
72015
Near volatile and non-volatile memory processing in 3D systems
MS Hosseini, M Ebrahimi, P Yaghini, N Bagherzadeh
IEEE Transactions on Emerging Topics in Computing 10 (3), 1657-1664, 2021
52021
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