| Theoretical study of some physical aspects of electronic transport in nMOSFETs at the 10-nm gate-length MV Fischetti, TP O'Regan, S Narayanan, C Sachs, S Jin, J Kim, Y Zhang IEEE Transactions on Electron Devices 54 (9), 2116-2136, 2007 | 143 | 2007 |
| Pseudopotential-based studies of electron transport in graphene and graphene nanoribbons MV Fischetti, J Kim, S Narayanan, ZY Ong, C Sachs, DK Ferry, SJ Aboud Journal of Physics: Condensed Matter 25 (47), 473202, 2013 | 101 | 2013 |
| An empirical pseudopotential approach to surface and line-edge roughness scattering in nanostructures: Application to Si thin films and nanowires and to graphene nanoribbons MV Fischetti, S Narayanan Journal of Applied Physics 110 (8), 2011 | 35 | 2011 |
| Semiclassical and quantum electronic transport in nanometer-scale structures: empirical pseudopotential band structure, Monte Carlo simulations and Pauli master equation MV Fischetti, B Fu, S Narayanan, J Kim Nano-Electronic Devices: Semiclassical and Quantum Transport Modeling, 183-247, 2011 | 18 | 2011 |
| Thickness and temperature dependence of the leakage current in hafnium-based Si SOI MOSFETs J Kim, SA Krishnan, S Narayanan, MP Chudzik, MV Fischetti Microelectronics Reliability 52 (12), 2907-2913, 2012 | 15 | 2012 |
| Extraction of parasitic and channel resistance components in FinFETs using TCAD tools S Narayanan, E Banghart, P Zeitzoff, K Korablev, SM Pandey, ... Solid-State Electronics 123, 44-50, 2016 | 11 | 2016 |
| Study of performance and leakage currents in nanometer-scale bulk, SOI and double-gate MOSFETs S Narayanan, C Sachs, MV Fischetti Journal of Computational Electronics 7, 24-27, 2008 | 6 | 2008 |
| Electron Transport in Engineered Substrates: Strain, Orientation, and Channel/Insulator Material Effects M Fischetti, S Narayanan, T O'Regan, C Sachs ECS Transactions 3 (7), 33, 2006 | 4 | 2006 |
| Contact model based on TCAD-experimental interactive algorithm P Feng, J Kim, J Cho, SM Pandey, S Narayanan, M Tng, B Liu, ... 2015 International Conference on Simulation of Semiconductor Processes and …, 2015 | 2 | 2015 |
| Field effect transistors with gate fins and method of making the same M Togo, T Kobayashi, S Narayanan US Patent App. 17/474,699, 2023 | 1 | 2023 |
| Structure with two adjacent metal layers in gate structure J Singh, S Narayanan, W Zheng US Patent App. 16/921,068, 2022 | 1 | 2022 |
| Optimization of the interconnect resistance contribution for STT-MRAM technology H Dixit, S Narayanan, B Pfefferling, J Mueller Microelectronics Journal 95, 104663, 2020 | 1 | 2020 |
| Physics of electronic transport in low-dimensionality materials for future FETs MV Fischetti, WG Vandenberghe, B Fu, S Narayanan, J Kim, ZY Ong, ... 2014 International Conference on Simulation of Semiconductor Processes and …, 2014 | 1 | 2014 |
| Pseudopotential-based study of electron transport in low-dimensionality nanostructures MV Fischetti, SJ Aboud, ZY Ong, J Kim, S Narayanan, CE Sachs ECS Transactions 58 (7), 229, 2013 | 1 | 2013 |
| Field effect transistors with gate fins and method of making the same M Togo, T Kobayashi, S Narayanan US Patent App. 17/474,760, 2023 | | 2023 |
| IC structure with fin having subfin extents with different lateral dimensions M Gu, W Li, S Narayanan US Patent 11,545,575, 2023 | | 2023 |
| Fin-based laterally diffused structure having a gate with two adjacent metal layers and method for manufacturing the same J Singh, S Narayanan, W Zheng US Patent 11,456,384, 2022 | | 2022 |
| Structure providing charge controlled electronic fuse J Singh, S Narayanan, AJ Joseph, WJ Taylor Jr, JB Johnson US Patent 11,387,353, 2022 | | 2022 |
| High-voltage diode finFET platform designs J Singh, S Narayanan US Patent 11,164,978, 2021 | | 2021 |
| (Invited) Ab Initio Study of Carrier Transport in Low-Dimensionality Materials MV Fischetti, WG Vandenberghe, G Gaddemane, S Chen, ZY Ong, ... Electrochemical Society Meeting Abstracts 232, 855-855, 2017 | | 2017 |
Massimo V FischettiThe University of Texas at DallasVerified email at utdallas.edu
