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J. Perez Acle
J. Perez Acle
Verified email at fing.edu.uy
Title
Cited by
Cited by
Year
NeuroFPGA-implementing artificial neural networks on programmable logic devices
D Ferrer, R González, R Fleitas, JP Acle, R Canetti
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
452004
Power estimations vs. power measurements in Spartan-6 devices
JP Oliver, JP Acle, E Boemo
2014 IX southern conference on Programmable Logic (SPL), 1-5, 2014
182014
Early, accurate dependability analysis of CAN-based networked systems
JP Acle, MS Reorda, M Violante
IEEE Design & Test of Computers 23 (1), 38-45, 2006
182006
A multi-level approach to the dependability analysis of networked systems based on the CAN protocol
F Corno, JP Acle, MS Reorda, M Violante
Proceedings of the 17th symposium on Integrated circuits and system design …, 2004
182004
Dependability analysis of CAN networks: an emulation-based approach
J Pérez, MS Reorda, M Violante
Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI …, 2003
142003
Accurate dependability analysis of CAN-based networked systems
J Pérez, MS Reorda, M Violante
16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003 …, 2003
132003
On the functional test of the cache coherency logic in multi-core systems
JP Acle, R Cantoro, E Sánchez, MS Reorda
2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2015
122015
Observability solutions for in-field functional test of processor-based systems: A survey and quantitative test case evaluation
JP Acle, R Cantoro, E Sánchez, MS Reorda, G Squillero
Microprocessors and Microsystems 47, 392-403, 2016
112016
Implementing a safe embedded computing system in SRAM-based FPGAs using IP cores: A case study based on the Altera NIOS-II soft processor
JP Acle, MS Reorda, M Violante
2011 IEEE Second Latin American Symposium on Circuits and Systems (LASCAS), 1-5, 2011
112011
Analysis and implementation of low-cost FPGA-based digital pulse-width modulators
I de León, G Sotta, G Eirea, JP Acle
2014 IEEE International Instrumentation and Measurement Technology …, 2014
102014
Validation of the dependability of CAN-based networked systems
F Corno, J Perez, M Ramasso, M Reorda, M Violante
Proceedings. Ninth IEEE International High-Level Design Validation and Test …, 2004
102004
FPGA-controlled PCBA power-on self-test using processor's debug features
B Du, E Sánchez, MS Reorda, JP Acle, A Tsertov
2016 IEEE 19th International Symposium on Design and Diagnostics of …, 2016
62016
A MULTI-LEVEL APPROACH TO THE DEPENDABILITY ANALYSIS OF CAN NETWORKS FOR AUTOMOTIVE APPLICATIONS
F Corno, J Pérez Acle, M Ramasso, M Sonza Reorda, M Violante
International Conference Integrated Chassis Control, 2004
52004
Accurate dependability analysis of CAN-based networked systems
J Pérez Acle, M Sonza Reorda, M Violante
IEEE, 2003
32003
Dependability Analysis of CAN Networks: an emulation-based approach
J Pérez Acle, M Sonza Reorda, M Violante
IEEE, 2003
32003
Implementation of Adaptive Logic Networks on an FPGA board
JP Oliver, AF de Oliveira, JP Acle, RJ de la Vega, RM Canetti
Configurable computing: technology and applications 3526, 264-273, 1998
31998
About performance faults in microprocessor core in-field testing
JP Acle, E Sanchez, MS Reorda
2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 229-232, 2019
22019
Auxiliary IP blocks for early dependability analysis of small processor based systems
J Barboza, J Basualdo, JP Acle
2016 17th Latin-American Test Symposium (LATS), 21-26, 2016
22016
Prototipado en FPGAs para inyección de fallas. Aplicación a sistemas distribuidos sobre bus CAN
JP Acle
Universidad de la República Montevideo, Uruguay 8, 2005
22005
Utilización de FPGAs como aceleradores de cálculo
JP Oliver, J Pérez Acle
UR. FING, 2001
22001
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