Shreyas Girish Singapura
Titolo
Citata da
Citata da
Anno
High-performance packet classification on GPU
S Zhou, SG Singapura, VK Prasanna
2014 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2014
562014
Quickly finding a truss in a haystack
O Green, J Fox, E Kim, F Busato, N Bombieri, K Lakhotia, S Zhou, ...
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017
172017
Recall: Reordered cache aware locality based graph processing
K Lakhotia, S Singapura, R Kannan, V Prasanna
2017 IEEE 24th International Conference on High Performance Computing (HiPC …, 2017
162017
Design and implementation of parallel pagerank on multicore platforms
S Zhou, K Lakhotia, SG Singapura, H Zeng, R Kannan, VK Prasanna, ...
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2017
122017
Energy performance of fpgas on perfect suite kernels
SR Kuppannagari, R Chen, A Sanny, SG Singapura, GPC Tran, S Zhou, ...
2014 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2014
92014
Optimal dynamic data layouts for 2D FFT on 3D memory integrated FPGA
R Chen, SG Singapura, VK Prasanna
The Journal of Supercomputing 73 (2), 652-663, 2017
52017
Performance modeling of matrix multiplication on 3D memory integrated FPGA
SG Singapura, A Panangadan, VK Prasanna
2015 IEEE International Parallel and Distributed Processing Symposium …, 2015
52015
OSCAR: Optimizing SCrAtchpad reuse for graph processing
SG Singapura, A Srivastava, R Kannan, VK Prasanna
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017
42017
Towards performance modeling of 3D memory integrated FPGA architectures
SG Singapura, A Panangadan, VK Prasanna
International Symposium on Applied Reconfigurable Computing, 443-450, 2015
42015
On-chip memory efficient data layout for 2D FFT on 3D memory integrated FPGA
SG Singapura, R Kannan, VK Prasanna
2016 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2016
32016
FPGA Based Accelerator for Pattern Matching in YARA Framework
SG Singapura, YHE Yang, A Panangadan, T Nemeth, VK Prasanna
Technical Report. Computer Engineering Technical Report. Los Angeles, CA …, 2015
22015
Optimal data layout for block-level random accesses to scratchpad
SG Singapura, R Kannan, VK Prasanna
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017
12017
FPGA-based Acceleration of Pattern Matching in YARA
SG Singapura, YHE Yang, A Panangadan, T Nemeth, P Ng, VK Prasanna
International Symposium on Applied Reconfigurable Computing, 320-327, 2016
12016
Area efficient reconfigurable architecture for current control loop of a servo controller
SG Shreyas, L Vachhani
2012 IEEE 7th International Conference on Industrial and Information Systems …, 2012
2012
Palchaudhuri, Ayan 104 Panda, Dhabaleswar K.(DK) 84, 213, 62 Panyala, Ajay 23 Park, Yoonho 94
V Pascucci, K Komatsu, K Kothapalli, S Krishnamoorthy, S Kumar, SE Kurt, ...
Il sistema al momento non può eseguire l'operazione. Riprova più tardi.
Articoli 1–15