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Mahdi Taheri
Mahdi Taheri
PhD researcher at TalTech
Email verificata su taltech.ee - Home page
Titolo
Citata da
Citata da
Anno
Deepaxe: A framework for exploration of approximation and reliability trade-offs in dnn accelerators
M Taheri, M Riazati, MH Ahmadilivani, M Jenihhin, M Daneshtalab, J Raik, ...
2023 24th International Symposium on Quality Electronic Design (ISQED), 1-8, 2023
102023
Dnn hardware reliability assessment and enhancement
M Taheri
27th IEEE European Test Symposium (ETS), 2022
52022
A high-performance MEMRISTOR-based Smith-Waterman DNA sequence alignment Using FPNI structure
M Taheri, H Zandevakili, A Mahani
Journal of Applied Research in Electrical Engineering 1 (1), 2021
52021
Appraiser: Dnn fault resilience analysis employing approximation errors
M Taheri, MH Ahmadilivani, M Jenihhin, M Daneshtalab, J Raik
2023 26th International Symposium on Design and Diagnostics of Electronic …, 2023
42023
Special Session: Approximation and Fault Resiliency of DNN Accelerators
MH Ahmadilivani, M Barbareschi, S Barone, A Bosio, M Daneshtalab, ...
2023 IEEE 41st VLSI Test Symposium (VTS), 1-10, 2023
42023
Development and hardware acceleration of a novel 2-DBWA-MEM DNA sequencing alignment algorithm
M Taheri, A Mahani
42021
A systematic literature review on hardware reliability assessment methods for deep neural networks
MH Ahmadilivani, M Taheri, J Raik, M Daneshtalab, M Jenihhin
ACM Computing Surveys 56 (6), 1-39, 2024
32024
Deepvigor: Vulnerability value ranges and factors for dnns’ reliability assessment
MH Ahmadilivani, M Taheri, J Raik, M Daneshtalab, M Jenihhin
2023 IEEE European Test Symposium (ETS), 1-6, 2023
32023
A Novel Fault-Tolerant Logic Style with Self-Checking Capability
M Taheri, S Sheikhpour, A Mahani, M Jenihhin
2022 IEEE 28th International Symposium on On-Line Testing and Robust System …, 2022
32022
Strengthened 32‐bit AES implementation: Architectural error correction configuration with a new voting scheme
S Sheikhpur, M Taheri, MS Ansari, A Mahani
IET Computers & Digital Techniques 15 (3), 1-14, 2021
32021
DMR-based Technique for Fault Tolerant AES S-box Architecture
M Taheri, S Sheikhpour, MS Ansari, A Mahani
1 st Conference on Applied Research in Electrical Engineering (AREE), 2021
32021
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators
M Taheri, N Cherezova, MS Ansari, M Jenihhin, A Mahani, ...
arXiv preprint arXiv:2401.09509, 2024
22024
Noise-tolerance gpu-based age estimation using resnet-50
M Taheri, M Taheri, A Hadjahmadi
arXiv preprint arXiv:2305.00848, 2023
22023
A fault-resistant architecture for aes s-box architecture
M Taheri, S Sheikhpour, MS Ansari, A Mahani
Journal of Applied Research in Electrical Engineering 1 (1), 86-92, 2022
22022
A Novel 2-D BWA-MEM FPGA Accelerator for Short-Read Mapping of the Whole Human Genome
M Taheri, A Mahani
Journal of Applied Research in Electrical Engineering 1 (2), 203-210, 2021
12021
Hardware acceleration of the novel two dimensional Burrows‐Wheeler Aligner algorithm with maximal exact matches seed extension kernel
M Taheri, MS Ansari, S Magierowski, A Mahani
IET Circuits, Devices & Systems 15 (2), 94-103, 2021
12021
SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators
M Taheri, M Daneshtalab, J Raik, M Jenihhin, S Pappalardo, P Jimenez, ...
arXiv preprint arXiv:2403.02946, 2024
2024
AdAM: Adaptive Fault-Tolerant Approximate Multiplier for Edge DNN Accelerators
M Taheri, N Cherezova, S Nazari, A Rafiq, A Azarpeyvand, ...
arXiv preprint arXiv:2403.02936, 2024
2024
Enhancing Fault Resilience of QNNs by Selective Neuron Splitting
MH Ahmadilivani, M Taheri, J Raik, M Daneshtalab, M Jenihhin
2023 IEEE 5th International Conference on Artificial Intelligence Circuits …, 2023
2023
LRDB: LSTM Raw data DNA Base-caller based on long-short term models in an active learning environment
A Rezaei, M Taheri, A Mahani, S Magierowski
arXiv preprint arXiv:2303.08915, 2023
2023
Il sistema al momento non puō eseguire l'operazione. Riprova pių tardi.
Articoli 1–20