Steven Thijs
Steven Thijs
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Design issues and considerations for low-cost 3-D TSV IC technology
G Van der Plas, P Limaye, I Loi, A Mercha, H Oprins, C Torregiani, S Thijs, ...
IEEE Journal of Solid-State Circuits 46 (1), 293-307, 2010
Vertical Si-Nanowire-Type Tunneling FETs With Low Subthreshold Swing () at Room Temperature
R Gandhi, Z Chen, N Singh, K Banerjee, S Lee
IEEE Electron Device Letters 32 (4), 437-439, 2011
Design methodology for MuGFET ESD protection devices
S Thijs, D Linten, DE Trémouilles
US Patent 7,923,266, 2011
A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS
D Linten, S Thijs, MI Natarajan, P Wambacq, W Jeamsaksiri, J Ramos, ...
IEEE Journal of Solid-State Circuits 40 (7), 1434-1442, 2005
Low-power 5 GHz LNA and VCO in 90 nm RF CMOS
D Linten, L Aspemyr, W Jeamsaksiri, J Ramos, A Mercha, S Jenei, S Thijs, ...
2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with− 17dB EVM at 7Gb/s
V Vidojkovic, G Mangraviti, K Khalaf, V Szortyka, K Vaesen, W Van Thillo, ...
2012 IEEE International Solid-State Circuits Conference, 268-270, 2012
50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS
K Raczkowski, S Thijs, W De Raedt, B Nauwelaers, P Wambacq
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
Calibrated wafer-level HBM measurements for quasi-static and transient device analysis
M Scholz, S Thijs, D Linten, D Trémouilles, M Sawada, T Nakaei, ...
EOS/ESD, 89-94, 2007
4A. 1 T-Diodes-A Novel Plug-and-Play Wideband RF Circuit ESD Protection Methodology
D Linten, M Dehan, M Scholz, S Thijs, G Groesenken, J Borromans, ...
Integration of a 90nm RF CMOS technology (200GHz f/sub max/-150GHz f/sub T/NMOS) demonstrated on a 5GHz LNA
W Jeamsaksiri, A Mercha, J Ramos, D Linten, S Thijs, S Jenei, ...
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 100-101, 2004
Advanced SCR ESD protection circuits for CMOS/SOI nanotechnologies
MPJ Mergens, O Marichal, S Thijs, B Van Camp, CC Russ
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005 …, 2005
Electrostatic discharge protected circuits
S Thijs, NM Iyer, D Linten
US Patent 7,649,722, 2010
Reliability issues in MuGFET nanodevices
G Groeseneken, F Crupi, A Shickova, S Thijs, D Linten, B Kaczer, ...
2008 IEEE International Reliability Physics Symposium, 52-60, 2008
A fully integrated 7.3 kV HBM ESD-protected transformer-based 4.5–6 GHz CMOS LNA
J Borremans, S Thijs, P Wambacq, Y Rolain, D Linten, M Kuijk
IEEE journal of solid-state circuits 44 (2), 344-353, 2009
Transient voltage overshoot in TLP testing—Real or artifact?
D Tremouilles, S Thijs, P Roussel, MI Natarajan, V Vassilev, ...
2005 Electrical Overstress/Electrostatic Discharge Symposium, 1-9, 2005
Understanding the optimization of sub-45nm FinFET devices for ESD applications
D Tremouilles, S Thijs, C Russ, J Schneider, C Duvvury, N Collaert, ...
2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD …, 2007
Next generation bulk FinFET devices and their benefits for ESD robustness
A Griffoni, S Thijs, C Russ, D Trémouilles, D Linten, M Scholz, N Collaert, ...
2009 31st EOS/ESD Symposium, 1-10, 2009
On gated diodes for ESD protection in bulk FinFET CMOS technology
S Thijs, A Griffoni, D Linten, SH Chen, T Hoffmann, G Groeseneken
EOS/ESD Symposium Proceedings, 1-8, 2011
Perspective of RF design in future planar and FinFET CMOS
J Borremans, B Parvais, M Dehan, S Thijs, P Wambacq, A Mercha, ...
2008 IEEE Radio Frequency Integrated Circuits Symposium, 75-78, 2008
A low-cost 90nm RF-CMOS platform for record RF circuit performance
W Jeamsaksiri, D Linten, S Thijs, G Carchon, J Ramos, A Mercha, X Sun, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 60-61, 2005
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