| A 28-GHz CMOS phased-array transceiver based on LO phase-shifting architecture with gain invariant phase tuning for 5G new radio J Pang, R Wu, Y Wang, M Dome, H Kato, H Huang, AT Narayanan, H Liu, ... IEEE Journal of Solid-State Circuits 54 (5), 1228-1242, 2019 | 175 | 2019 |
| A 28-GHz CMOS phased-array beamformer utilizing neutralized bi-directional technique supporting dual-polarized MIMO for 5G NR J Pang, Z Li, R Kubozoe, X Luo, R Wu, Y Wang, D You, AA Fadila, ... IEEE Journal of Solid-State Circuits 55 (9), 2371-2386, 2020 | 160 | 2020 |
| A 265- W Fractional- Digital PLL With Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65 … H Liu, Z Sun, H Huang, W Deng, T Siriburanon, J Pang, Y Wang, R Wu, ... IEEE Journal of Solid-State Circuits 54 (12), 3478-3492, 2019 | 61 | 2019 |
| An ADPLL-centric bluetooth low-energy transceiver with 2.3 mW interference-tolerant hybrid-loop receiver and 2.9 mW single-point polar transmitter in 65nm CMOS H Liu, Z Sun, D Tang, H Huang, T Kaneko, W Deng, R Wu, K Okada, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 444-446, 2018 | 61 | 2018 |
| A CMOS dual-polarized phased-array beamformer utilizing cross-polarization leakage cancellation for 5G MIMO systems J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... IEEE Journal of Solid-State Circuits 56 (4), 1310-1326, 2021 | 51 | 2021 |
| A DPLL-centric Bluetooth low-energy transceiver with a 2.3-mW interference-tolerant hybrid-loop receiver in 65-nm CMOS H Liu, Z Sun, D Tang, H Huang, T Kaneko, Z Chen, W Deng, R Wu, ... IEEE Journal of Solid-State Circuits 53 (12), 3672-3687, 2018 | 38 | 2018 |
| A 28GHz CMOS phased-array transceiver featuring gain invariance based on LO phase shifting architecture with 0.1-degree beam-steering resolution for 5G new radio J Pang, R Wu, Y Wang, M Dome, H Kato, H Huang, AT Narayanan, H Liu, ... 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 56-59, 2018 | 38 | 2018 |
| A fully-synthesizable fractional-N injection-locked PLL for digital clocking with triangle/sawtooth spread-spectrum modulation capability in 5-nm CMOS B Liu, Y Zhang, J Qiu, H Huang, Z Sun, D Xu, H Zhang, Y Wang, J Pang, ... IEEE Solid-State Circuits Letters 3, 34-37, 2020 | 23 | 2020 |
| A 28-GHz CMOS phased-array beamformer supporting dual-polarized MIMO with cross-polarization leakage cancellation J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 16 | 2020 |
| A 0.85mm2BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver Z Sun, H Liu, D Tang, H Huang, T Kaneko, R Wu, W Deng, K Okada ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 15 | 2018 |
| A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth J Qiu, Z Sun, B Liu, W Wang, D Xu, H Herdian, H Huang, Y Zhang, ... IEEE Journal of Solid-State Circuits 56 (12), 3741-3755, 2021 | 14 | 2021 |
| A fast-beam-switching 28-GHz phased-array transceiver supporting cross-polarization leakage self-cancellation J Pang, Z Li, X Luo, J Alvin, K Yanagisawa, Y Zhang, Z Chen, Z Huang, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 12 | 2021 |
| A 0.85mm2 BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch Z Sun, H Liu, H Huang, D Tang, D Xu, T Kaneko, Z Li, J Pang, R Wu, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (1), 196-209, 2020 | 10 | 2020 |
| A 28ghz cmos differential bi-directional amplifier for 5g nr Z Li, J Pang, R Kubozoe, X Luo, R Wu, Y Wang, D You, AA Fadila, J Alvin, ... 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 5-6, 2020 | 9 | 2020 |
| A 6.5-to-8GHz cascaded dual-fractional-N digital PLL achieving-63.7 dBc fractional spurs with 50MHz reference D Xu, Y Zhang, H Huang, Z Sun, B Liu, AA Fadila, J Qiu, Z Liu, W Wang, ... 2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023 | 4 | 2023 |
| A 32kHz-reference 2.4 GHz fractional-N nonuniform oversampling PLL with gain-boosted PD and loop-gain calibration J Qiu, W Wang, Z Sun, B Liu, Y Zhang, D Xu, H Huang, AA Fadila, Z Liu, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 80-82, 2023 | 2 | 2023 |
| A 78 fs RMS jitter injection-locked clock multiplier using transformer-based ultra-low-power VCO Z Sun, H Liu, D Xu, H Huang, B Liu, Z Li, J Pang, T Someya, A Shirane ESSCIRC 2019-IEEE 45th European Solid State Circuits Conference (ESSCIRC …, 2019 | 2 | 2019 |
| A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter Y Zhang, Z Sun, B Liu, J Qiu, D Xu, Y Zhang, X Fu, D You, H Huang, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 1 | 2023 |
| A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner Z Sun, H Liu, D Xu, H Huang, B Liu, Z Li, J Pang, T Someya, A Shirane, ... IEICE Transactions on Electronics 104 (7), 289-299, 2021 | 1 | 2021 |
| A Compact TF-Based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications Z Sun, D Xu, H Huang, Z Li, H Liu, B Liu, J Pang, T Someya, A Shirane, ... IEICE Transactions on Electronics 103 (10), 505-513, 2020 | 1 | 2020 |
Kenichi OkadaTokyo Institute of TechnologyVerified email at ee.e.titech.ac.jp
