| VLSI architectures for turbo codes G Masera, G Piccinini, MR Roch, M Zamboni IEEE Transactions on Very Large Scale Integration (VLSI) Systems 7 (3), 369-379, 1999 | 221 | 1999 |
| An NCL-HDL snake-clock-based magnetic QCA architecture M Graziano, M Vacca, A Chiolerio, M Zamboni IEEE Transactions on nanotechnology 10 (5), 1141-1149, 2011 | 79 | 2011 |
| Architectural strategies for low-power VLSI turbo decoders G Masera, M Mazza, G Piccinini, F Viglione, M Zamboni IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10 (3), 279-285, 2002 | 69 | 2002 |
| A VLSI architecture for IWT (integer wavelet transform) M Martina, G Masera, G Piccinini, M Zamboni Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat …, 2000 | 62 | 2000 |
| Topolinano: a cad tool for nano magnetic logic F Riente, G Turvani, M Vacca, MR Roch, M Zamboni, M Graziano IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 60 | 2017 |
| Majority voter full characterization for nanomagnet logic circuits M Vacca, M Graziano, M Zamboni IEEE transactions on nanotechnology 11 (5), 940-947, 2012 | 55 | 2012 |
| MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture SV Tota, MR Casu, MR Roch, L Rostagno, M Zamboni 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 46 | 2010 |
| Magnetoelastic clock system for nanomagnet logic M Vacca, M Graziano, L Di Crescenzo, A Chiolerio, A Lamberti, D Balma, ... IEEE Transactions on nanotechnology 13 (5), 963-973, 2014 | 43 | 2014 |
| Asynchrony in quantum-dot cellular automata nanocomputation: Elixir or poison? M Graziano, M Vacca, D Blua, M Zamboni IEEE Design & Test of Computers 28 (5), 72-83, 2011 | 40 | 2011 |
| A comprehensive submicrometer MOST delay model and its application to CMOS buffers P Cocchini, G Piccinini, M Zamboni IEEE Journal of Solid-State Circuits 32 (8), 1254-1262, 1997 | 38 | 1997 |
| Feedbacks in QCA: A quantitative approach M Vacca, J Wang, M Graziano, MR Roch, M Zamboni IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (10 …, 2014 | 37 | 2014 |
| Nanomagnet logic: an architectural level overview M Vacca, M Graziano, J Wang, F Cairo, G Causapruno, G Urgese, A Biroli, ... Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives, 223-256, 2014 | 37 | 2014 |
| Nanomagnetic logic microprocessor: Hierarchical power model M Vacca, M Graziano, M Zamboni IEEE Transactions on very large scale integration (VLSI) systems 21 (8 …, 2012 | 37 | 2012 |
| Asynchronous solutions for nanomagnetic logic circuits M Vacca, M Graziano, M Zamboni ACM Journal on Emerging Technologies in Computing Systems (JETC) 7 (4), 1-18, 2011 | 37 | 2011 |
| A case study for NoC-based homogeneous MPSoC architectures SV Tota, MR Casu, MR Roch, L Macchiarulo, M Zamboni IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (3), 384-388, 2009 | 34 | 2009 |
| Logic-in-memory: A nano magnet logic implementation M Cofano, G Santoro, M Vacca, D Pala, G Causapruno, F Cairo, F Riente, ... 2015 IEEE Computer Society Annual Symposium on VLSI, 286-291, 2015 | 32 | 2015 |
| Logic-in-memory architecture made real D Pala, G Causapruno, M Vacca, F Riente, G Turvani, M Graziano, ... 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1542-1545, 2015 | 32 | 2015 |
| Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations M Martina, G Masera, G Piccinini, M Zamboni Journal of VLSI signal processing systems for signal, image and video …, 2003 | 32 | 2003 |
| A technology aware magnetic QCA NCL-HDL architecture M Graziano, A Chiolerio, M Zamboni 2009 9th IEEE Conference on Nanotechnology (IEEE-NANO), 763-766, 2009 | 30 | 2009 |
| A receiver architecture conforming to the OFDM based digital video broadcasting standard for terrestrial transmission (DVB-T) P Combelles, C Del Toso, D Hepper, D Le Goff, JJ Ma, P Robertson, ... ICC'98. 1998 IEEE International Conference on Communications. Conference …, 1998 | 28 | 1998 |
