| Exploiting machine learning against on-chip power analysis attacks: Tradeoffs and design considerations F Kenarangi, I Partin-Vaisband IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 769-781, 2018 | 27 | 2018 |
| Leveraging independent double-gate FinFET devices for machine learning classification F Kenarangi, I Partin-Vaisband IEEE Transactions on Circuits and Systems I: Regular Papers 66 (11), 4356-4367, 2019 | 14 | 2019 |
| Exploiting dual-gate ambipolar CNFETs for scalable machine learning classification F Kenarangi, X Hu, Y Liu, JAC Incorvia, JS Friedman, I Partin-Vaisband Scientific reports 10 (1), 5735, 2020 | 8 | 2020 |
| A single-MOSFET analog high resolution-targeted (SMART) multiplier for machine learning classification F Kenarangi, I Partin-Vaisband IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (4 …, 2021 | 2 | 2021 |
| A single-MOSFET MAC for confidence and resolution (CORE) driven machine learning classification F Kenarangi, I Partin-Vaisband arXiv preprint arXiv:1910.09597, 2019 | 2 | 2019 |
| PySyn: A Rapid Synthesis for Mixed-Signal Machine Learning Classification F Kenarangi, I Partin-Vaisband 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021 | 1 | 2021 |
| Security Network On-Chip for Mitigating Side-Channel Attacks F Kenarangi, I Partin-Vaisband 2019 ACM/IEEE International Workshop on System Level Interconnect Prediction …, 2019 | 1 | 2019 |
| NoD: A Neural Network-Over-Decoder for Edge Intelligence AF Ajirlou, F Kenarangi, E Shapira, I Partin-Vaisband IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (10 …, 2022 | | 2022 |
| Heterogeneous Machine Learning Circuits for Nanoscale ICs F Kenarangi University of Illinois at Chicago, 2022 | | 2022 |
Inna Partin-VaisbandUniversity of Illinois ChicagoEmail verificata su uic.edu
