Jianglin Du
Jianglin Du
Verified email at ucdconnect.ie
Cited by
Cited by
Investigating the surface state of graphene quantum dots
S Zhu, J Shao, Y Song, X Zhao, J Du, L Wang, H Wang, K Zhang, J Zhang, ...
Nanoscale 7 (17), 7927-7933, 2015
Insight into the effect of functional groups on visible-fluorescence emissions of graphene quantum dots
J Du, H Wang, L Wang, S Zhu, Y Song, B Yang, H Sun
Journal of Materials Chemistry C 4 (11), 2235-2242, 2016
Efficient inorganic solar cells from aqueous nanocrystals: the impact of composition on carrier dynamics
Z Chen, Q Zeng, F Liu, G Jin, X Du, J Du, H Zhang, B Yang
RSC advances 5 (91), 74263-74269, 2015
Strong coupling in hybrid plasmon-modulated nanostructured cavities
ZY Zhang, HY Wang, JL Du, XL Zhang, YW Hao, QD Chen, HB Sun
Applied Physics Letters 105 (19), 191117, 2014
17.6 A 21.7-to-26.5 GHz Charge-Sharing Locking Quadrature PLL with Implicit Digital Frequency-Tracking Loop Achieving 75fs Jitter and− 250dB FoM
Y Hu, X Chen, T Siriburanon, J Du, Z Gao, V Govindaraj, A Zhu, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 276-278, 2020
Surface plasmon-modulated fluorescence on 2D metallic silver gratings
ZY Zhang, HY Wang, JL Du, XL Zhang, YW Hao, QD Chen, HB Sun
IEEE Photonics Technology Letters 27 (8), 821-823, 2015
A 0.3V, 35% Tuning-Range, 60kHz 1/f3-Corner Digitally Controlled Oscillator with Vertically Integrated Switched Capacitor Banks Achieving FoMT of -199dB in 28 …
J Du, Y Hu, T Siriburanon, RB Staszewski
2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019
A Tiny Complementary Oscillator With 1/f3 Noise Reduction Using a Triple-8-Shaped Transformer
X Chen, Y Hu, T Siriburanon, J Du, RB Staszewski, A Zhu
IEEE Solid-State Circuits Letters 3, 162-165, 2020
Dynamics of low-threshold random laser based on TiO2 nanoparticle films
Du Jiang-lin, G Bing-rong, W Hai-yu, C Qi-dai
CHINESE OPTICS 9 (2), 249-254, 2016
A Type-II Phase-Tracking Receiver
S Hu, J Du, P Chen, HM Nguyen, P Quinlan, T Siriburanon, ...
IEEE Journal of Solid-State Circuits, 2020
A 2.02–2.87-GHz− 249-dB FoM 1.1-mW Digital PLL Exploiting Reference-Sampling Phase Detector
J Du, T Siriburanon, Y Hu, V Govindaraj, RB Staszewski
IEEE Solid-State Circuits Letters 3, 158-161, 2020
Dickson-Charge-Pump-Based Voltage-to-Time Conversion for Time-Based ADCs in 28nm CMOS
A Esmailiyan, J Du, T Siriburanon, F Schembari, RB Staszewski
IEEE Open Journal of Circuits and Systems, 2020
Charge Analysis in SAR ADC with Discrete-Time Reference Driver
FA Shiwani, T Siriburanon, J Du, RB Staszewski
2020 31st Irish Signals and Systems Conference (ISSC), 1-6, 2020
DTC-Assisted All-Digital Phase-Locked Loop Exploiting Hybrid Time/Voltage Phase Digitization
V Govindaraj, J Du, Y Hu, T Siriburanon, RB Staszewski
2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 81-84, 2019
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Articles 1–14