| A 39-GHz 64-element phased-array transceiver with built-in phase and amplitude calibrations for large-array 5G NR in 65-nm CMOS Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ... IEEE Journal of Solid-State Circuits 55 (5), 1249-1269, 2020 | 158 | 2020 |
| ULPAC: A miniaturized ultralow-power atomic clock H Zhang, H Herdian, AT Narayanan, A Shirane, M Suzuki, K Harasaka, ... IEEE Journal of Solid-State Circuits 54 (11), 3135-3148, 2019 | 43 | 2019 |
| A 39GHz 64-element phased-array CMOS transceiver with built-in calibration for large-array 5G NR Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ... 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 279-282, 2019 | 38 | 2019 |
| A 60-GHz 3.0-Gb/s spectrum efficient BPOOK transceiver for low-power short-range wireless in 65-nm CMOS Y Wang, B Liu, R Wu, H Liu, AT Narayanan, J Pang, N Li, T Yoshioka, ... IEEE Journal of Solid-State Circuits 54 (5), 1363-1374, 2019 | 37 | 2019 |
| A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration B Liu, Y Zhang, J Qiu, HC Ngo, W Deng, K Nakata, T Yoshioka, J Emmei, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (2), 603-616, 2020 | 33 | 2020 |
| A fully-synthesizable fractional-N injection-locked PLL for digital clocking with triangle/sawtooth spread-spectrum modulation capability in 5-nm CMOS B Liu, Y Zhang, J Qiu, H Huang, Z Sun, D Xu, H Zhang, Y Wang, J Pang, ... IEEE Solid-State Circuits Letters 3, 34-37, 2020 | 23 | 2020 |
| 0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur H Zhang, AT Narayanan, H Herdian, B Liu, Y Wang, A Shirane, K Okada 2019 Symposium on VLSI Circuits, C38-C39, 2019 | 23 | 2019 |
| A 1.2 ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique B Liu, HC Ngo, K Nakata, W Deng, Y Zhang, J Qiu, T Yoshioka, J Emmei, ... 2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018 | 20 | 2018 |
| An HDL-described fully-synthesizable sub-GHz IoT transceiver with ring oscillator based frequency synthesizer and digital background EVM calibration B Liu, Y Zhang, J Qiu, W Deng, Z Xu, H Zhang, J Pang, Y Wang, R Wu, ... 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 15 | 2019 |
| A 0.4-ps-jitter− 52-dBc-spur synthesizable injection-locked PLL with self-clocked nonoverlap update and slope-balanced subsampling BBPD B Liu, HC Ngo, K Nakata, W Deng, Y Zhang, J Qiu, T Yoshioka, J Emmei, ... IEEE Solid-State Circuits Letters 2 (1), 5-8, 2019 | 13 | 2019 |
| A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal Y Wang, D You, X Fu, T Nakamura, AA Fadila, T Someya, A Kawaguchi, ... IEEE Journal of Solid-State Circuits 57 (2), 356-370, 2021 | 12 | 2021 |
| 29.4 Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping H Zhang, H Herdian, AT Narayanan, A Shirane, M Suzuki, K Harasaka, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 462-464, 2019 | 11 | 2019 |
| 29.4 Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping H Zhang, H Herdian, AT Narayanan, A Shirane, M Suzuki, K Harasaka, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 462-464, 2019 | 11 | 2019 |
| A CMOS Ka-band SATCOM transceiver with ACI-cancellation enhanced dual-channel low-NF wide-dynamic-range RX and high-linearity TX Y Wang, D You, X Fu, T Nakamura, AA Fadila, T Someya, A Kawaguchi, ... 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 355-358, 2020 | 9 | 2020 |
| A 100mW 3.0 Gb/s spectrum efficient 60 GHz Bi-Phase OOK CMOS transceiver Y Wang, B Liu, H Liu, AT Narayanan, J Pang, N Li, T Yoshioka, ... 2017 Symposium on VLSI Circuits, C298-C299, 2017 | 8 | 2017 |
| A pulse VCO with tail filter H Zhang, AT Narayanan, B Liu, K Okada, A Matsuzawa 2017 IEEE Asia Pacific Microwave Conference (APMC), 942-945, 2017 | 6 | 2017 |
| A power-efficient pulse-VCO for chip-scale atomic clock H Zhang, AT Narayanan, H Herdian, B Liu, R Wu, A Shirane, K Okada IEICE Transactions on Electronics 102 (4), 276-286, 2019 | 4 | 2019 |
| A− 194 dBc/Hz FoM VCO with Low-Supply Sensitivity for Ultra-Low-Power Atomic Clock H Zhang, H Herdian, AT Narayanan, B Liu, R Wu, A Shirane, K Okada 2018 Asia-Pacific Microwave Conference (APMC), 788-790, 2018 | 4 | 2018 |
| 10GHz Varactor-less VCO with Helium-3 Ion Irradiated Inductor H Herdian, H Zhang, AT Narayanan, A Shirane, K Okada 2019 IEEE Asia-Pacific Microwave Conference (APMC), 63-65, 2019 | | 2019 |
| An Ultra-Low-Power Miniaturized Atomic Clock Based on CMOS Frequency Probing and Synchronization Loop H Zhang, K Okada (No Title), 2019 | | 2019 |
