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Hyuk-Jun Lee
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Cited by
Year
Slack-based bus arbitration scheme for soft real-time constrained embedded systems
M Jun, K Bang, HJ Lee, N Chang, EY Chung
2007 Asia and South Pacific Design Automation Conference, 159-164, 2007
252007
Immediate soft error detection using pass gate logic for content addressable memory
HJ Lee
Electronics Letters 44 (4), 269-270, 2008
232008
Latency-aware bus arbitration for real-time embedded systems
M Jun, K Bang, HJ Lee, EY Chung
IEICE transactions on information and systems 90 (3), 676-679, 2007
202007
A performance and usability aware secure two-factor user authentication scheme for wireless sensor networks
SG Yoo, H Lee, J Kim
International Journal of Distributed Sensor Networks 9 (5), 543950, 2013
142013
FeSSD: A Fast Encrypted SSD Employing On-Chip Access-Control Memory
J Lee, K Ganesh, HJ Lee, Y Kim
IEEE Computer Architecture Letters 16 (2), 115-118, 2017
122017
An adaptive idle-time exploiting method for low latency NAND flash-based storage devices
SH Park, D Kim, K Bang, HJ Lee, S Yoo, EY Chung
IEEE Transactions on Computers 63 (5), 1085-1096, 2012
122012
Scalable QoS-aware memory controller for high-bandwidth packet memory
HJ Lee, EY Chung
IEEE transactions on very large scale integration (VLSI) systems 16 (3), 289-301, 2008
122008
Energy‐efficient adaptive optical character recognition for wearable devices
S Son, H So, J Kim, D Choi, HJ Lee
Electronics Letters 52 (2), 113-115, 2016
72016
A novel nand flash memory architecture for maximally exploiting plane-level parallelism
M Kim, W Jung, HJ Lee, EY Chung
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (8 …, 2019
62019
Classifying Useful Motion Vectors for Efficient Frame Rate Up Conversion of MC-DCT Encoded Video Streams.
J Nang, S Kim, HJ Lee
J. Inf. Sci. Eng. 30 (6), 1755-1771, 2014
62014
Analytical memory bandwidth model for many-core processor based systems
HJ Lee, WC Cho, EY Chung
ieice electronics express 9 (18), 1461-1466, 2012
62012
High-speed interconnect schemes for a pipelined FPGA
HJ Lee, MJ Flynn
IEE Proceedings-Computers and Digital Techniques 147 (3), 195-202, 2000
62000
Per-operation reusability based allocation and migration policy for hybrid cache
M Oh, K Kim, D Choi, HJ Lee, EY Chung
IEEE Transactions on Computers 69 (2), 158-171, 2019
42019
A high-bandwidth PCM-based memory system for highly available IP routing table lookup
C Kim, H Lee
IEEE Computer Architecture Letters 17 (2), 246-249, 2018
42018
Page overwriting method for performance improvement of NAND flash memories
S Won, EY Chung, D Kim, J Chung, B Han, H Lee
ieice electronics express 10 (6), 20130039-20130039, 2013
42013
Application-aware design parameter exploration of NAND flash memory
K Bang, DG Kim, SH Park, EY Chung, HJ Lee
JSTS: Journal of Semiconductor Technology and Science 13 (4), 291-302, 2013
42013
Highly available packet buffer design with hybrid nonvolatile memory
Y Song, J Hwang, I Jo, H Lee
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (11 …, 2021
32021
Stt-mram-based multicontext fpga for multithreading computing environment
J Kim, Y Song, K Cho, H Lee, H Yoon, EY Chung
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
32021
Application specific cache design using STT-RAM based block-RAM for FPGA-based soft processors
H Park, H So, H Lee
IEICE Electronics Express 15 (10), 20180330-20180330, 2018
32018
A dynamic block device reconfiguration algorithm in virtual MapReduce cluster
K Lee, Y Nam, T Kim, S Park, HJ Lee, J Yang
Cluster computing 17, 1171-1183, 2014
32014
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