| Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Great Lakes Symposium on VLSI, 77-82, 1997 | 428 | 1997 |
| A survey on compiler autotuning using machine learning AH Ashouri, W Killian, J Cavazos, G Palermo, C Silvano ACM Computing Surveys (CSUR) 51 (5), 1-42, 2018 | 260 | 2018 |
| Address bus encoding techniques for system-level power optimization L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Design, Automation and Test in Europe, 861-866, 1998 | 207 | 1998 |
| Respir: A response surface-based pareto iterative refinement for application-specific design space exploration G Palermo, C Silvano, V Zaccaria IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 177 | 2009 |
| Secure memory accesses on networks-on-chip L Fiorin, G Palermo, S Lukovic, V Catalano, C Silvano IEEE Transactions on Computers 57 (9), 1216-1229, 2008 | 146 | 2008 |
| A power modeling and estimation framework for VLIW-based embedded systems L Benini, D Bruni, M Chinosi, C Silvano, V Zaccaria, R Zafalon Proc. Int. Workshop on Power And Timing Modeling, Optimization and …, 2001 | 122 | 2001 |
| Multi-objective design space exploration of embedded systems G Palermo, C Silvano, V Zaccaria Journal of Embedded Computing 1 (3), 305-316, 2005 | 117 | 2005 |
| Multicube: Multi-objective design space exploration of multi-core architectures C Silvano, W Fornaciari, G Palermo, V Zaccaria, F Castro, M Martinez, ... VLSI 2010 Annual Symposium: Selected papers, 47-63, 2011 | 114 | 2011 |
| Cobayn: Compiler autotuning framework using bayesian networks AH Ashouri, G Mariani, G Palermo, E Park, J Cavazos, C Silvano ACM Transactions on Architecture and Code Optimization (TACO) 13 (2), 1-25, 2016 | 112 | 2016 |
| Micomp: Mitigating the compiler phase-ordering problem using optimization sub-sequences and machine learning AH Ashouri, A Bignoli, G Palermo, C Silvano, S Kulkarni, J Cavazos ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 1-28, 2017 | 110 | 2017 |
| A security monitoring service for NoCs L Fiorin, G Palermo, C Silvano Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware …, 2008 | 105 | 2008 |
| Power estimation of embedded systems: A hardware/software codesign approach W Fornaciari, P Gubian, D Sciuto, C Silvano IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (2), 266-275, 1998 | 102 | 1998 |
| Exploration of distributed shared memory architectures for NoC-based multiprocessors M Monchiero, G Palermo, C Silvano, O Villa Journal of Systems Architecture 53 (10), 719-732, 2007 | 100 | 2007 |
| Power optimization of system-level address buses based on software profiling W Fornaciari, M Polentarutti, D Sciuto, C Silvano Proceedings of the eighth international workshop on Hardware/software …, 2000 | 91 | 2000 |
| PIRATE: A framework for power/performance exploration of network-on-chip architectures G Palermo, C Silvano International Workshop on Power and Timing Modeling, Optimization and …, 2004 | 88 | 2004 |
| An instruction-level energy model for embedded VLIW architectures M Sami, D Sciuto, C Silvano, V Zaccaria IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 81 | 2002 |
| An industrial design space exploration framework for supporting run-time resource management on multi-core systems G Mariani, P Avasare, G Vanmeerbeeck, C Ykman-Couvreur, G Palermo, ... 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 79 | 2010 |
| Power estimation for architectural exploration of HW/SW communication on system-level buses W Fornaciari, D Sciuto, C Silvano Proceedings of the seventh international workshop on Hardware/software …, 1999 | 76 | 1999 |
| Security aspects in networks-on-chips: Overview and proposals for secure implementations L Fiorin, C Silvano, M Sami 10th Euromicro Conference on Digital System Design Architectures, Methods …, 2007 | 74 | 2007 |
| Energy estimation and optimization of embedded VLIW processors based on instruction clustering A Bona, M Sami, D Sciuto, V Zaccaria, C Silvano, R Zafalon Proceedings of the 39th annual Design Automation Conference, 886-891, 2002 | 73 | 2002 |
Gianluca PalermoFull Professor at Politecnico di MilanoEmail verificata su polimi.it
